Icom IC-F50, IC-F51 Receiver Circuits, Antenna Switching Circuit Main Unit, RF Circuit Main Unit

SECTION 4 CIRCUIT DESCRIPTION

4-1 RECEIVER CIRCUITS

4-1-1 ANTENNA SWITCHING CIRCUIT (MAIN UNIT)

The antenna switching circuit functions as a low-pass filter while receiving and a resonator circuit while transmitting. This circuit does not allow transmit signals to enter the receiver circuits.

Received signals enter the antenna connector (CHASSIS; J1) and pass through the low-pass filter (L1, L2, C1–C5). The filtered signals are passed through the λ⁄4 type antenna switching circuit (D5, D6, L5, L6) and then applied to the RF circuit.

4-1-2 RF CIRCUIT (MAIN UNIT)

The RF circuit amplifies signals within the range of frequen- cy coverage and filters out-of-band signals.

The signals from the antenna switching circuit pass through the two-stage tunable bandpass filters (D4, D8, L7, L8). The filtered signals are amplified at the RF amplifier (Q2) and then passed through the another two-stage tunable band- pass filters (D9, D10, L9, L11) to suppress unwanted sig- nals. The filtered signals are applied to the 1st mixer circuit.

D4, D8–D10 employ varactor diodes, that are controlled by the CPU via the D/A converter (IC6), to track the bandpass filter. These varactor diodes tune the center frequency of an RF pass band for wide bandwidth receiving and good image response rejection.

4-1-3 1ST MIXER AND 1ST IF CIRCUITS (MAIN UNIT)

The 1st mixer circuit converts the received signal into fixed frequency of the 1st IF signal with the PLL output frequency. By changing the PLL frequency, only the desired frequency passes through a crystal filter at the next stage of the 1st mixer.

• 2ND IF AND DEMODULATOR CIRCUITS

The RF signals from the bandpass filter are mixed with the 1st LO signals, where come from the RX VCO circuit via the attenuator (R26–R28), at the 1st mixer circuit (Q3) to pro- duce a 46.35 MHz 1st IF signal. The 1st IF signal is passed through a monolithic filter (FI1) in order to obtain selection capability and to pass only the desired signals. The filtered signal is applied to the 2nd IF circuit after being amplified at the 1st IF amplifier (Q4).

4-1-4 2ND IF AND DEMODULATOR CIRCUITS (MAIN UNIT)

The 2nd mixer circuit converts the 1st IF signal into a 2nd IF signal. The double-conversion superheterodyne system (which convert receive signals twice) improves the image rejection ratio and obtains stable receiver gain.

The 1st IF signal from the IF amplifier (Q4) is applied to the 2nd mixer section of the FM IF IC (IC1, pin 16), and is mixed with the 2nd LO signal to be converted into a 450 kHz 2nd IF signal.

The FM IF IC (IC1) contains the 2nd mixer, 2nd local oscil- lator, limiter amplifier, quadrature detector, active filter and noise amplifier circuits. A 2nd LO signal (45.9 MHz) is pro- duced at the PLL circuit by tripling it’s reference frequency (15.3 MHz).

The 2nd IF signal from the 2nd mixer (IC1, pin 3) passes through the ceramic filter (FI2) to remove unwanted hetero- dyned frequencies. It is then amplified at the limiter amplifi- er section (IC1, pin 5) and applied to the quadrature detec- tor section (IC1, pins 10, 11) to demodulate the 2nd IF sig- nal into AF signals.

The demodulated AF signals are output from pin 9 (IC1) and applied to the AF circuit via the receiver mute circuit.

"SQIN" signal from the D/A converter IC (IC6, pin 2)

AF signal "DET"

8

Active filter

FM

detector

9

	2nd IF filter										X2
	450 kHz						Q19
										15.3 MHz
				45.9		MHz			PLL IC
		FI2					⋅3	2		1
7	5		3		2				IC4

	Noise	Noise
	detector	comp.		Mixer
	Limiter
	amp.
		RSSI		IC1 TA31136FN
10	11	12	13	16 1st IF from the IF amplifier (Q4)
			"NOIS" signal to the CPU (FRONT unit; IC401, pin 41)
	R5V	"RSSI" signal to the CPU (FRONT unit; IC401, pin 50)

X2

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