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Intel 21555 manual Signal and Default Information, A.1 J2 J4, J5, and J6 Connector Pinouts

Models: 21555

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Signal and Default Information	A

A.1 J2 J4, J5, and J6 Connector Pinouts

Table A-1gives the Mictor connectors pin assignment and DE1B55503 schematic signal names. See Figure 1 on page 6 for the location of this connector.

Table A-1. J2 Connector Secondary AD Signals

Schematic	Mictor	Mictor	Schematic
Signal Name	Pin Number	Pin Number	Signal Name

+5V	1	2	SCL

GND	3	4	SDA

S_CLK0_2	5	6	S_CLK0_3
CLK	5	6	CLKB
CLK			CLKB

S_AD63	7	8	S_AD47

S_AD62	9	10	S_AD46

S_AD61	11	12	S_AD45

S_AD60	13	14	S_AD44

S_AD59	15	16	S_AD43

S_AD58	17	18	S_AD42

S_AD57	19	20	S_AD41

S_AD56	21	22	S_AD40

S_AD55	23	24	S_AD39

S_AD54	25	26	S_AD38

S_AD53	27	28	S_AD37

S_AD52	29	30	S_AD36

S_AD51	31	32	S_AD35

S_AD50	33	34	S_AD34

S_AD49	35	36	S_AD33

S_AD48	37	38	S_AD32

21555 PCI-to-PCI Bridge Evaluation Board User’s Guide

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Intel 21555 manual Signal and Default Information, A.1 J2 J4, J5, and J6 Connector Pinouts

Contents

November User’s Guide21555 PCI-to-PCI Bridge Evaluation Board 21555 PCI-to-PCI Bridge Evaluation Board User’s Guide Figures ContentsSwitch Operations for Synchronous or Asynchronous Clock Control TablesJ21 Switch Operations for Central Function and Arbiter Control 1.1 Overview 1.2 FeaturesIntroduction Introduction 1.3.1 Connectors1.3 Major Components Introduction 1.3.2 Switches and Jumper1.3.3 Devices Introduction 1.4 Switch SettingsFigure 2. Switches Table 2. Stake-Pin Jumper a 1.5 Stake-Pin JumperTable 1. DIP Switch Operation IntroductionFigure 3. Jumper Resistors 1.6 Resistor Jumpers21555 IntroductionIntroduction 1.6.1 Clock Configuration1.6.2 Clamping Voltage Table 3. Clock Configuration JumpersTable 5. Slot and IDSEL Mapping 1.7 Secondary Slot Numbering and IDSEL MappingIntroduction Figure 4. Local PCI Slot NumberingTable 6. Interrupt ORing 1.8 Interrupt RoutingIntroduction 21555 1.9 Typical ConfigurationsIntroduction 21555 PCI-to-PCI Bridge Evaluation Board User’s Guide21555 PCI-to-PCI Bridge Evaluation Board User’s Guide IntroductionFigure 6 shows the DE1B55503 with two local bus option cards Figure 6. DE1B55503 with Two Local Bus Option CardsPage 2.1 Specifications Operations and Installation2.2 Hardware Requirements 2.3 Software Requirements2.3.2 Programming the Flash ROM Operations and Installation2.3.1 Programming the SROM 2.3.2.2 Running DbFlash.exe 2.4 Installation Procedure2.3.2.1 Board Setup Operations and InstallationTable 9. Interrupt ORing 2.5 Interrupt RoutingOperations and Installation 3.2 Central Function and Arbiter Control Optional Configurations3.1 PICMG Configuration 3.3 Asynchronous Clocking Optional Configurations21555 PCI-to-PCI Bridge Evaluation Board User’s Guide Signal and Default InformationA.1 J2 J4, J5, and J6 Connector Pinouts Table A-3. J5 CBE, REQ, and GNT Signal and Default InformationTable A-2. J4 Pin Assignments LSTAT Signal and Default Information21555 PCI-to-PCI Bridge Evaluation Board User’s Guide Table A-5. J1 JATAG Connector A.2 JATAG Connector PinoutA.3 Factory Default Switch and Jumper Configuration Signal and Default Information