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Intel 21555 manual Switches and Jumper, Devices, Introduction

Models: 21555

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Introduction

Note: See Table A-2 on page 24 for Mictor pinouts.

1.3.2Switches and Jumper

The DE1B55503 uses a combination of DIP switch, stake-pin and zero ohm resistor jumpers to control the various configuration options. See Section 1.4, Section 1.5, and Section 1.6 for information.

•J8 is a single stake pin jumper. See Section 1.5 for information.

•J9, J20, and J21 are five-switch switch packs. The dual-pole switches are labeled SW1 through SW5. They control the options at power up such as the direction of the REQ# and GNT# lines, the on-board parallel ROM functions, and the enabling of the asynchronous clock options for the local bus. See Section 1.4 for information.

•Figure 3 on page 10 identifies the location of each configuration jumper.

1.3.3Devices

•E1 is the voltage regulator that produces the 3.3 and 5 V clamping signal. See Section 1.6.2.

•E2 is the 21555 PCI-to-PCI Bridge.

•E3 is the clock buffer.

•E4 is the serial ROM (SROM).

•Y1 is a 33.333 MHz crystal oscillator that can be used for an independent local clock signal.

•E5 is the Parallel ROM. This device is nonvolatile EEPROM. See Section 2.3.2, “Programming the Flash ROM” on page 18.

•E7, E8, and E9 are address latches.

•E6 (not shown) is the empty socket for attaching a ROM emulator.

•L1 is a LED that indicates the status of the LOO bit (LED On or Off bit) which is switched through software. This LED can light if jumper J8 is installed.

•L2 is a LED that indicates DE1B55503 5Vdc power status.

21555 PCI-to-PCI Bridge Evaluation Board User’s Guide

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Intel 21555 manual Switches and Jumper, Devices, Introduction

Contents

21555 PCI-to-PCI Bridge Evaluation Board User’s GuideNovember 21555 PCI-to-PCI Bridge Evaluation Board User’s Guide Figures ContentsJ21 Switch Operations for Central Function and Arbiter Control TablesSwitch Operations for Synchronous or Asynchronous Clock Control Introduction 1.2 Features1.1 Overview 1.3 Major Components 1.3.1 ConnectorsIntroduction 1.3.3 Devices 1.3.2 Switches and JumperIntroduction Figure 2. Switches 1.4 Switch SettingsIntroduction Table 2. Stake-Pin Jumper a 1.5 Stake-Pin JumperTable 1. DIP Switch Operation IntroductionFigure 3. Jumper Resistors 1.6 Resistor Jumpers21555 IntroductionIntroduction 1.6.1 Clock Configuration1.6.2 Clamping Voltage Table 3. Clock Configuration JumpersTable 5. Slot and IDSEL Mapping 1.7 Secondary Slot Numbering and IDSEL MappingIntroduction Figure 4. Local PCI Slot NumberingIntroduction 1.8 Interrupt RoutingTable 6. Interrupt ORing 21555 1.9 Typical ConfigurationsIntroduction 21555 PCI-to-PCI Bridge Evaluation Board User’s Guide21555 PCI-to-PCI Bridge Evaluation Board User’s Guide IntroductionFigure 6 shows the DE1B55503 with two local bus option cards Figure 6. DE1B55503 with Two Local Bus Option CardsPage 2.1 Specifications Operations and Installation2.2 Hardware Requirements 2.3 Software Requirements2.3.1 Programming the SROM Operations and Installation2.3.2 Programming the Flash ROM 2.3.2.2 Running DbFlash.exe 2.4 Installation Procedure2.3.2.1 Board Setup Operations and InstallationOperations and Installation 2.5 Interrupt RoutingTable 9. Interrupt ORing 3.1 PICMG Configuration Optional Configurations3.2 Central Function and Arbiter Control 3.3 Asynchronous Clocking Optional ConfigurationsA.1 J2 J4, J5, and J6 Connector Pinouts Signal and Default Information21555 PCI-to-PCI Bridge Evaluation Board User’s Guide Table A-2. J4 Pin Assignments Signal and Default InformationTable A-3. J5 CBE, REQ, and GNT 21555 PCI-to-PCI Bridge Evaluation Board User’s Guide Signal and Default InformationLSTAT Table A-5. J1 JATAG Connector A.2 JATAG Connector PinoutA.3 Factory Default Switch and Jumper Configuration Signal and Default Information