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IXP12xx manual
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17 pages, 131.77 Kb
IXP12xx ATM OC12/Ethernet IP
Router Example Design
Performance and Headroom Analysis
April, 2002
Document Number: 301144-001
Contents
Main
Version 1.0, 4/10/02
Page 3 of 17
IXP12xx ATM OC12/Ethernet IP Router Example Design Performance and Headroom Analysis
OVERVIEW
MEASUREMENT ENVIRONMENT
Alternate DRAM Timing
Page
Version 1.0, 4/10/02
Figure 3 Expected Ethernet Transmit Bandwidth
Figure 2 Frame and PDU Length versus IP Packet Length
Page 6 of 17
Multiple Cells/PDU Workload
CYCLE AND INSTRUCTION BUDGETS
Cycle Budgets to support Line Rates
Page 7 of 17
Developers Workbench IX Bus Simulator Bounded and Unbounded Wire Rates
Page 8 of 17
SIMULATION MEASUREMENT PROCEDURE AND RESULTS
Simulated 29-byte packet performance1
Page 9 of 17
Simulated 40-byte and 1500-byte packet performance2
HARDWARE MEASUREMENT PROCEDURE AND RESULTS
Hardware Measurement Results
Page 10 of 17
Hardware 29-byte packet performance
Page 11 of 17
Hardware 40-byte packet performance
Page 12 of 17
Hardware 1500-byte packet performance
StrongARM CORE PERFORMANCE
Page 13 of 17
Queue to Core Measurement Technique
ATM Queue to Core Throughput
Ethernet Queue to Core Throughput
Page 14 of 17
RESOURCE UTILIZATION AND HEADROOM ANALYSIS
Microengine Register and Microstore Headroom
Page 15 of 17
Scratchpad RAM Capacity
SRAM Capacity
Page 16 of 17
SDRAM Capacity
SRAM and SDRAM Bandwidth
Page 17 of 17
APPENDIX
Buffer Allocation in DRAM