Intel KM4M DRAM CAS Latency, Bank Interleave, Precharge To Active Trp, Trans Non-DDR400/DDR400

Models: G52-M6734XD MS-6734 KM4AM KM4M

1 74
Download 74 pages 19.67 Kb
Page 44
Image 44

BIOS Setup

DRAM CAS Latency

When synchronous DRAM is installed, the number of clock cycles of CAS latency depends on the DRAM timing. The settings are: 1.5, 2, 2.5, 3.

Bank Interleave

This field selects 2-bank or 4-bank interleave for the installed SDRAM. Disable the function if 16MB SDRAM is installed. Settings: Disabled, 2 Bank and 4 Bank.

Precharge To Active (Trp)

This item controls the number of cycles for Row Address Strobe (RAS) to be allowed to precharge. If insufficient time is allowed for the RAS to accumulate its charge before DRAM refresh, refreshing may be incomplete and DRAM may fail to retain data. This item applies only when synchronous DRAM is installed in the system. Available settings: 2T, 3T.

Trans Non-DDR400/DDR400

This controls the timing delay (in clock cycles) before non-DDR400 and DDR400 starts a write command after receiving it. Settings: 6T/8T, 7T/10T, 5T/6T, 8T/12T. 12T increases the delay time while 5T provides the least timing delay. This option is effective only if DDR400 is running.

Active to CMD (Trcd)

When DRAM is refreshed, both rows and columns are addressed separately. This setup item allows you to determine the timing of the transition from RAS (row address strobe) to CAS (column address strobe). The less the clock cycles, the faster the DRAM performance. Setting options: 2T, 3T.

DRAM Burst Length

This setting allows you to set the size of Burst-Length for DRAM. Bursting feature is a technique that DRAM itself predicts the address of the next memory location to be accessed after the first address is accessed. To use the feature, you need to define the burst length, which is the actual length of burst plus the starting address and allows internal address counter to properly generate the next memory location. The bigger the size, the faster the DRAM performance. Settings: 4, 8.

DRAM Command Rate

This setting controls the SDRAM command rate. Selecting 1T allows SDRAM signal controller to run at 1T (T=clock cycles) rate. Selecting 2T makes SDRAM signal controller run at 2T rate. 1T is faster than 2T. Setting options: 1T Command, 2T Command.

DDR Voltage

Adjusting the DDR voltage can increase the DDR speed. Any changes made to this setting may cause a stability issue, so changing the DDR voltage for long-term purpose is NOT recommended.

3-11

Page 44
Image 44
Intel KM4M DRAM CAS Latency, Bank Interleave, Precharge To Active Trp, Trans Non-DDR400/DDR400, Active to CMD Trcd, 3-11