Manuals / Intel / Computer Equipment / Network Card

Intel LPCI-7200S PCIS-ISG ISaGRAFTM driver, PCIS-ICL InControlTM Driver, PCIS-OPC OPC Server

Models: LPCI-7200S

1 71

Page 14

1.4.7 PCIS-ISG: ISaGRAFTM driver

The ISaGRAF WorkBench is an IEC1131-3 SoftPLC control program development environment. The PCIS-ISG includes ADLINK products’ target drivers for ISaGRAF under the Windows NT environment. The PCIS-ISG is included on the ADLINK CD. It requires a license.

1.4.8 PCIS-ICL: InControlTM Driver

PCIS-ICL is the InControl driver, which support the Windows NT. The PCIS-ICL is included on the ADLINK CD. It requires a license.

1.4.9 PCIS-OPC: OPC Server

PCIS-OPC is an OPC Server that can link with OPC clients. Many software packages on the market provide OPC clients. PCIS-OPC supports Windows NT. It requires a license.

6 • Introduction

Page 14

Image 14

Intel LPCI-7200S manual PCIS-ISG ISaGRAFTM driver, PCIS-ICL InControlTM Driver, PCIS-OPC OPC Server, Introduction

Contents

Recycled Paper 12MB/S High Speed Digital Input/ Output Card User’s GuideNuDAQ→ / NuIPC→ PCI-7200 / cPCI-7200 / LPCI-7200S Page Trademarks Detailed Company Information Getting Service from ADLINKADLINK TECHNOLOGY INC QuestionsChapter 1 Introduction Table of ContentsChapter 2 Installation Chapter 3 Register FormatChapter 6 Double Buffer Mode Principle WarrantyChapter 5 C/C++ Libraries Chapter 7 LimitationsIntroduction How to Use This GuideInstallation Chapter 3 Register Structure & FormatPage Introduction Introduction1.1 Applications ‹ Digital I/O DIO z Number of DI Channels 32 TTL compatible 1.2 Features1.3 Specifications z Number of DO Channels 32 TTL compatible z Data Transfer Modez Power Consumption z Connectorz Dimension z PCI signaling environment4 Introduction 1.4 Software Supporting1.4.1 Programming Library 1.4.4 DAQBenchTM ActiveX Controls 1.4.2 PCIS-LVIEW LabVIEW Driver1.4.3 PCIS-VEE HP-VEE Driver 1.4.5 DASYLabTM PRO1.4.9 PCIS-OPC OPC Server 1.4.7 PCIS-ISG ISaGRAFTM driver1.4.8 PCIS-ICL InControlTM Driver 6 IntroductionInstallation Installation2.1 What Included You are now ready to install your PCI-7200 2.3 Device Installation for Windows Systems2.2 Unpacking 8 InstallationALTERA 2.4 PCI-7200/cPCI-7200/LPCI-7200S’s LayoutFigure 2.1a PCI-7200 Layout Diagram Installation PCI -Bus ControllerFigure 2.1b cPCI-7200 Layout Diagram 10 Installation Dimension mm CN1A CN1B Figure 2.1c LPCI-7200S Layout Diagram Installation12 Installation Dimension mmFigure 2.1d LPCI-7200S with standard PCI bracket Layout Diagram Installation Procedures 2.5 Hardware Installation OutlineHardware configuration InstallationFigure 2.2 CN1 Pin Assignments 14 Installation 2.6 Connector Pin Assignments2.6.1 PCI-7200 Pin Assignments DI11 Figure 2.3 CN2 Pin Assignments InstallationDI10 DI129820 2.6.2 cPCI-7200 Pin Assignments16 Installation 9921Figure 2.5 CN1A Pin Assignments 2.6.3 LPCI-7200S Pin AssignmentsInstallation 18 Installation Figure 2.6 CN1B Pin Assignments4MHz Clock 2.7 8254 for Timer Pacer GenerationTimer Timer20 Installation 2.8 LPCI-7200S PCI Bus Signaling2.9 Onboard Pull-ups and Terminations in digital input Register Format Register Format3.1 I/O Registers Format 3.4 DIO Status & Control Register BASE + 3.2 Digital Input Register BASE +3.3 Digital Output Register BASE + Address BASE + Attribute READ Only Data Format‹ Digital Output Mode Setting ‹ Digital Input Mode SettingIACK Input ACK Enable Register FormatAddress BASE + 1C Attribute READ/WRITE Data Format 3.5 Interrupt Status & Control Register BASE + 1C‹ Digital I/O FIFO Status ‹ Interrupt ControlRegister Format T0EN Interrupt is triggered by timer 0 output‹ Timer Configuration Control 26 Register Format ‹ IREQ Polarity Selection‹ FIFO Control and Status cPCI-7200 only 3.6 8254 Timer Registers BASE + Register FormatPage Operation Theory Operation Theory4.1 Direct Program Control Timer 4.2 Timer Pacer ModeCLK0 Timer TimerIREQ & IACK for Digital Input 4.3 External Clock Mode4.4 Handshaking Operation TheoryOREQ & OACK for Digital Output 32 Operation TheoryD10~DI31 4.5 Timing CharacteristicIN IREQ t h ≥ 60nsD10~DI31 IN IREQIN IACK valid datat1 19ns t2 1 PCI CLK Cycle t3 5 PCI CLK Cycle OUTREQO REQt2 OUTACKDO0~Do31valid datavalid data Operation TheoryPage C/C++ Libraries 5.1 Libraries InstallationC/C++ Libraries 5.2.2 Data Types 5.2 Programming Guide5.2.1 Naming Convention 38 C/C++ Libraries@ Syntax 5.3 7200Initial@ Description Visual C++ Windows@ Description 5.4 7200SwitchCardNo5.5 7200AUXDI @ Syntax@ Description 5.6 7200AUXDIChannel5.7 7200AUXDO @ Syntax@ Description 5.8 7200AUXDOChannel5.9 7200DI @ Syntax@ Description 5.10 7200DIChannel5.11 7200DO @ Syntax@ Syntax 5.12 7200DOChannel@ Description Visual C++ Windows@ Syntax 5.13 7200AllocDMAMem@ Description Visual C++ Windows@ Description 5.14 7200FreeDMAMem5.15 7200AllocDBDMAMem @ Syntax@ Return Code 5.16 7200FreeDBDMAMem5.17 7200DIDMAStart @ Description48 C/C++ Libraries Visual Basic Windows @ SyntaxVisual C++ Windows C/C++ DOS@ Return Code 5.18 7200DIDMAStatusclearfifo @ Description@ Description 5.19 7200DIDMAStop5.20 7200DblBufferMode @ Syntax@ Description 5.21 7200CheckHalfReady5.22 7200DblBufferTransfer @ Syntax@ Description 5.23 7200GetOverrunStatus5.24 7200DODMAStart @ Syntax@ Argument 5.25 7200DODMAStatusC/C++ DOS @ Return Code@ Argument 5.26 7200DODMAStopC/C++ DOS @ Return Code@ Syntax 5.27 7200DITimer@ Description Visual C++ Windows@ Return Code 5.28 7200DOTimerERRNoError ERRInvalidBoardNumber ERRInvalidTimerMode ERRBoardNoInit @ DescriptionVisual Basic Windows @ SyntaxVisual C++ Windows C/C++ DOSDouble Buffer Mode Principle Double Buffer Mode Principle60 Double Buffer Mode Principle Limitations LimitationsPage Warranty Policy Product Warranty/Service