Manuals / Intel / Computer Equipment / Network Card

Intel PCI-7200/cPCI-7200/LPCI-7200S’s Layout, Altera, PCI -Bus Controller, PCI-7200 Rev A1

Models: LPCI-7200S

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2.4 PCI-7200/cPCI-7200/LPCI-7200S’s Layout

	CN1
	CN1	....... ............... ... .....
		....... ............... ... .....
		. . . . . . . . . .

ALTERA

PCI-7200 Rev A1

PCI -Bus Controller

CN2

Figure 2.1(a) PCI-7200 Layout Diagram

Installation • 9

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Image 17

Intel PCI-7200/cPCI-7200/LPCI-7200S’s Layout, Altera, PCI -Bus Controller, 1a PCI-7200 Layout Diagram Installation

Contents

Recycled Paper 12MB/S High Speed Digital Input/ Output Card User’s GuideNuDAQ→ / NuIPC→ PCI-7200 / cPCI-7200 / LPCI-7200S Page Trademarks ADLINK TECHNOLOGY INC Getting Service from ADLINKDetailed Company Information QuestionsChapter 2 Installation Table of ContentsChapter 1 Introduction Chapter 3 Register FormatChapter 5 C/C++ Libraries WarrantyChapter 6 Double Buffer Mode Principle Chapter 7 LimitationsInstallation How to Use This GuideIntroduction Chapter 3 Register Structure & FormatPage Introduction Introduction1.1 Applications 1.3 Specifications 1.2 Features‹ Digital I/O DIO z Number of DI Channels 32 TTL compatible z Number of DO Channels 32 TTL compatible z Data Transfer Modez Storage Temperature -20ºC to 80ºC ‹ General Specifications z Operating Temperature 0ºC to 60ºCz Connector z Dimension4 Introduction 1.4 Software Supporting1.4.1 Programming Library 1.4.3 PCIS-VEE HP-VEE Driver 1.4.2 PCIS-LVIEW LabVIEW Driver1.4.4 DAQBenchTM ActiveX Controls 1.4.5 DASYLabTM PRO1.4.8 PCIS-ICL InControlTM Driver 1.4.7 PCIS-ISG ISaGRAFTM driver1.4.9 PCIS-OPC OPC Server 6 IntroductionInstallation Installation2.1 What Included 2.2 Unpacking 2.3 Device Installation for Windows SystemsYou are now ready to install your PCI-7200 8 InstallationFigure 2.1a PCI-7200 Layout Diagram Installation 2.4 PCI-7200/cPCI-7200/LPCI-7200S’s LayoutALTERA PCI -Bus ControllerFigure 2.1b cPCI-7200 Layout Diagram 10 Installation Figure 2.1c LPCI-7200S Layout Diagram Installation Dimension mm CN1A CN1B12 Installation Dimension mmFigure 2.1d LPCI-7200S with standard PCI bracket Layout Diagram Hardware configuration 2.5 Hardware Installation OutlineInstallation Procedures InstallationFigure 2.2 CN1 Pin Assignments 14 Installation 2.6 Connector Pin Assignments2.6.1 PCI-7200 Pin Assignments DI10 Figure 2.3 CN2 Pin Assignments InstallationDI11 DI1216 Installation 2.6.2 cPCI-7200 Pin Assignments9820 9921Figure 2.5 CN1A Pin Assignments 2.6.3 LPCI-7200S Pin AssignmentsInstallation Figure 2.6 CN1B Pin Assignments 18 InstallationTimer 2.7 8254 for Timer Pacer Generation4MHz Clock Timer20 Installation 2.8 LPCI-7200S PCI Bus Signaling2.9 Onboard Pull-ups and Terminations in digital input Register Format Register Format3.1 I/O Registers Format 3.3 Digital Output Register BASE + 3.2 Digital Input Register BASE +3.4 DIO Status & Control Register BASE + Address BASE + Attribute READ Only Data FormatIACK Input ACK Enable ‹ Digital Input Mode Setting‹ Digital Output Mode Setting Register Format‹ Digital I/O FIFO Status 3.5 Interrupt Status & Control Register BASE + 1CAddress BASE + 1C Attribute READ/WRITE Data Format ‹ Interrupt ControlRegister Format T0EN Interrupt is triggered by timer 0 output‹ Timer Configuration Control 26 Register Format ‹ IREQ Polarity Selection‹ FIFO Control and Status cPCI-7200 only Register Format 3.6 8254 Timer Registers BASE +Page Operation Theory Operation Theory4.1 Direct Program Control CLK0 Timer 4.2 Timer Pacer ModeTimer Timer4.4 Handshaking 4.3 External Clock ModeIREQ & IACK for Digital Input Operation Theory32 Operation Theory OREQ & OACK for Digital OutputIN IREQ 4.5 Timing CharacteristicD10~DI31 t h ≥ 60nsIN IACK IN IREQD10~DI31 valid dataDO0~Do31valid datavalid data OUTREQO REQt2 OUTACKt1 19ns t2 1 PCI CLK Cycle t3 5 PCI CLK Cycle Operation TheoryPage C/C++ Libraries 5.1 Libraries InstallationC/C++ Libraries 5.2.1 Naming Convention 5.2 Programming Guide5.2.2 Data Types 38 C/C++ Libraries@ Description 5.3 7200Initial@ Syntax Visual C++ Windows5.5 7200AUXDI 5.4 7200SwitchCardNo@ Description @ Syntax5.7 7200AUXDO 5.6 7200AUXDIChannel@ Description @ Syntax5.9 7200DI 5.8 7200AUXDOChannel@ Description @ Syntax5.11 7200DO 5.10 7200DIChannel@ Description @ Syntax@ Description 5.12 7200DOChannel@ Syntax Visual C++ Windows@ Description 5.13 7200AllocDMAMem@ Syntax Visual C++ Windows5.15 7200AllocDBDMAMem 5.14 7200FreeDMAMem@ Description @ Syntax5.17 7200DIDMAStart 5.16 7200FreeDBDMAMem@ Return Code @ Description48 C/C++ Libraries Visual C++ Windows @ SyntaxVisual Basic Windows C/C++ DOSclearfifo 5.18 7200DIDMAStatus@ Return Code @ Description5.20 7200DblBufferMode 5.19 7200DIDMAStop@ Description @ Syntax5.22 7200DblBufferTransfer 5.21 7200CheckHalfReady@ Description @ Syntax5.24 7200DODMAStart 5.23 7200GetOverrunStatus@ Description @ SyntaxC/C++ DOS 5.25 7200DODMAStatus@ Argument @ Return CodeC/C++ DOS 5.26 7200DODMAStop@ Argument @ Return Code@ Description 5.27 7200DITimer@ Syntax Visual C++ WindowsERRNoError ERRInvalidBoardNumber ERRInvalidTimerMode ERRBoardNoInit 5.28 7200DOTimer@ Return Code @ DescriptionVisual C++ Windows @ SyntaxVisual Basic Windows C/C++ DOSDouble Buffer Mode Principle Double Buffer Mode Principle60 Double Buffer Mode Principle Limitations LimitationsPage Product Warranty/Service Warranty Policy