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Intel LPCI-7200S 3 CN2 Pin Assignments Installation, DI10, DI11, DI12, DI13, DI14, DI15, Itrg

Models: LPCI-7200S

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DI 0	1	20
	2		DO0
DI 1		21
	3		DO1
DI 2		22
	4		DO2
DI 3
		23
	5		DO3
DI 4		24
	6		DO4
DI 5		25
	7		DO5
DI 6		26
	8		DO6
DI 7		27
	9		DO7
DI 8		28
	10		DO8
DI 9
		29
	11		DO9
DI10		30
	12		DO10
DI11
		31
	13		DO11
DI12
		32
	14		DO12
DI13		33
	15		DO13
DI14		34
	16		DO14
DI15		35
	17		DO15
+5V		36

I_ACK	18	37	GND
	19		I_TRG
I_REQ

Figure 2.3 CN2 Pin Assignments

Installation • 15

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Intel LPCI-7200S manual 3 CN2 Pin Assignments Installation, DI10, DI11, DI12, DI13, DI14, DI15, Itrg

Contents

Recycled Paper 12MB/S High Speed Digital Input/ Output Card User’s GuideNuDAQ→ / NuIPC→ PCI-7200 / cPCI-7200 / LPCI-7200S Page Trademarks Questions Getting Service from ADLINKADLINK TECHNOLOGY INC Detailed Company InformationChapter 3 Register Format Table of ContentsChapter 2 Installation Chapter 1 IntroductionChapter 7 Limitations WarrantyChapter 5 C/C++ Libraries Chapter 6 Double Buffer Mode PrincipleChapter 3 Register Structure & Format How to Use This GuideInstallation IntroductionPage Introduction Introduction1.1 Applications z Number of DO Channels 32 TTL compatible z Data Transfer Mode 1.2 Features1.3 Specifications ‹ Digital I/O DIO z Number of DI Channels 32 TTL compatiblez Dimension ‹ General Specifications z Operating Temperature 0ºC to 60ºCz Storage Temperature -20ºC to 80ºC z Connector4 Introduction 1.4 Software Supporting1.4.1 Programming Library 1.4.5 DASYLabTM PRO 1.4.2 PCIS-LVIEW LabVIEW Driver1.4.3 PCIS-VEE HP-VEE Driver 1.4.4 DAQBenchTM ActiveX Controls6 Introduction 1.4.7 PCIS-ISG ISaGRAFTM driver1.4.8 PCIS-ICL InControlTM Driver 1.4.9 PCIS-OPC OPC ServerInstallation Installation2.1 What Included 8 Installation 2.3 Device Installation for Windows Systems2.2 Unpacking You are now ready to install your PCI-7200PCI -Bus Controller 2.4 PCI-7200/cPCI-7200/LPCI-7200S’s LayoutFigure 2.1a PCI-7200 Layout Diagram Installation ALTERAFigure 2.1b cPCI-7200 Layout Diagram 10 Installation Figure 2.1c LPCI-7200S Layout Diagram Installation Dimension mm CN1A CN1B12 Installation Dimension mmFigure 2.1d LPCI-7200S with standard PCI bracket Layout Diagram Installation 2.5 Hardware Installation OutlineHardware configuration Installation ProceduresFigure 2.2 CN1 Pin Assignments 14 Installation 2.6 Connector Pin Assignments2.6.1 PCI-7200 Pin Assignments DI12 Figure 2.3 CN2 Pin Assignments InstallationDI10 DI119921 2.6.2 cPCI-7200 Pin Assignments16 Installation 9820Figure 2.5 CN1A Pin Assignments 2.6.3 LPCI-7200S Pin AssignmentsInstallation Figure 2.6 CN1B Pin Assignments 18 InstallationTimer 2.7 8254 for Timer Pacer GenerationTimer 4MHz Clock20 Installation 2.8 LPCI-7200S PCI Bus Signaling2.9 Onboard Pull-ups and Terminations in digital input Register Format Register Format3.1 I/O Registers Format Address BASE + Attribute READ Only Data Format 3.2 Digital Input Register BASE +3.3 Digital Output Register BASE + 3.4 DIO Status & Control Register BASE +Register Format ‹ Digital Input Mode SettingIACK Input ACK Enable ‹ Digital Output Mode Setting‹ Interrupt Control 3.5 Interrupt Status & Control Register BASE + 1C‹ Digital I/O FIFO Status Address BASE + 1C Attribute READ/WRITE Data FormatRegister Format T0EN Interrupt is triggered by timer 0 output‹ Timer Configuration Control 26 Register Format ‹ IREQ Polarity Selection‹ FIFO Control and Status cPCI-7200 only Register Format 3.6 8254 Timer Registers BASE +Page Operation Theory Operation Theory4.1 Direct Program Control Timer 4.2 Timer Pacer ModeCLK0 Timer TimerOperation Theory 4.3 External Clock Mode4.4 Handshaking IREQ & IACK for Digital Input32 Operation Theory OREQ & OACK for Digital Outputt h ≥ 60ns 4.5 Timing CharacteristicIN IREQ D10~DI31valid data IN IREQIN IACK D10~DI31Operation Theory OUTREQO REQt2 OUTACKDO0~Do31valid datavalid data t1 19ns t2 1 PCI CLK Cycle t3 5 PCI CLK CyclePage C/C++ Libraries 5.1 Libraries InstallationC/C++ Libraries 38 C/C++ Libraries 5.2 Programming Guide5.2.1 Naming Convention 5.2.2 Data TypesVisual C++ Windows 5.3 7200Initial@ Description @ Syntax@ Syntax 5.4 7200SwitchCardNo5.5 7200AUXDI @ Description@ Syntax 5.6 7200AUXDIChannel5.7 7200AUXDO @ Description@ Syntax 5.8 7200AUXDOChannel5.9 7200DI @ Description@ Syntax 5.10 7200DIChannel5.11 7200DO @ DescriptionVisual C++ Windows 5.12 7200DOChannel@ Description @ SyntaxVisual C++ Windows 5.13 7200AllocDMAMem@ Description @ Syntax@ Syntax 5.14 7200FreeDMAMem5.15 7200AllocDBDMAMem @ Description@ Description 5.16 7200FreeDBDMAMem5.17 7200DIDMAStart @ Return Code48 C/C++ Libraries C/C++ DOS @ SyntaxVisual C++ Windows Visual Basic Windows@ Description 5.18 7200DIDMAStatusclearfifo @ Return Code@ Syntax 5.19 7200DIDMAStop5.20 7200DblBufferMode @ Description@ Syntax 5.21 7200CheckHalfReady5.22 7200DblBufferTransfer @ Description@ Syntax 5.23 7200GetOverrunStatus5.24 7200DODMAStart @ Description@ Return Code 5.25 7200DODMAStatusC/C++ DOS @ Argument@ Return Code 5.26 7200DODMAStopC/C++ DOS @ ArgumentVisual C++ Windows 5.27 7200DITimer@ Description @ Syntax@ Description 5.28 7200DOTimerERRNoError ERRInvalidBoardNumber ERRInvalidTimerMode ERRBoardNoInit @ Return CodeC/C++ DOS @ SyntaxVisual C++ Windows Visual Basic WindowsDouble Buffer Mode Principle Double Buffer Mode Principle60 Double Buffer Mode Principle Limitations LimitationsPage Product Warranty/Service Warranty Policy

DI10

DI11

DI12

DI13

DI14

DI15

I_TRG

Figure 2.3 CN2 Pin Assignments