Intel LPCI-7200S Timing Characteristic, In Ireq, D10~DI31, t h ≥ 60ns, t I ≥ 60ns, t s ≥ 2ns

4.5 Timing Characteristic

1.I_REQ as input data strobe (Rising Edge Active)

		th	tl
IN_ I_REQ
			cyc
			t
D10~DI31		valid data	valid data
	s	tn
	t
th ≥ 60ns	tI ≥ 60ns		tCYC ≥ 5 PCI CLK Cycle
ts ≥ 2ns	tn ≥ 30ns

2.I_REQ as input data strobe (Falling Edge Active)

	th		tl
IN_R I_REQ		t
		cyc
D10~DI31	valid data		valid data
	t	tn
	s
th ≥ 60ns	tI ≥ 60ns		tCYC ≥ 5 PCI CLK Cycle
ts ≥ 2ns	tn ≥ 30ns
			Operation Theory • 33