Intel LPCI-7200S Table of Contents, Introduction, Installation, Register Format, Operation Theory

Table of Contents

Chapter 1 Introduction			1
1.1	Applications		1
1.2	Features		2
1.3	Specifications		2
1.4	Software Supporting		4
	1.4.1	Programming Library	4
	1.4.2	PCIS-LVIEW: LabVIEW® Driver	5
	1.4.3	PCIS-VEE: HP-VEE Driver	5
	1.4.4	DAQBenchTM: ActiveX Controls	5
	1.4.5	DASYLabTM PRO	5
	1.4.6	PCIS-DDE: DDE Server and InTouchTM	5
	1.4.7	PCIS-ISG: ISaGRAFTM driver	6
	1.4.8	PCIS-ICL: InControlTM Driver	6
	1.4.9	PCIS-OPC: OPC Server	6

Chapter 2 Installation			7
2.1	What Included		7
2.2	Unpacking		8
2.3	Device Installation for Windows Systems		8
2.4	PCI-7200/cPCI-7200/LPCI-7200S’s Layout		9
2.5	Hardware Installation Outline		13
2.6	Connector Pin Assignments		14
	2.6.1	PCI-7200 Pin Assignments	14
	2.6.2	cPCI-7200 Pin Assignments	16
	2.6.3	LPCI-7200S Pin Assignments	17
2.7	8254 for Timer Pacer Generation		19
2.8	LPCI-7200S PCI Bus Signaling		20
2.9	Onboard Pull-ups and Terminations in digital input		20

Chapter 3 Register Format		21
3.1	I/O Registers Format	21
3.2	Digital Input Register (BASE + 10)	22
3.3	Digital Output Register (BASE + 14)	22
3.4	DIO Status & Control Register (BASE + 18)	22
3.5	Interrupt Status & Control Register (BASE + 1C)	24
3.6	8254 Timer Registers (BASE + 0)	27

Chapter 4 Operation Theory		29
4.1	Direct Program Control	29
4.2	Timer Pacer Mode	30

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