Intel PPC-7508F M1 user manual Advanced Chipset Features, Chipset Features Setup Screen

Chapter 4 Award BIOS Setup

4-5. ADVANCED CHIPSET FEATURES

Choose the〝ADVANCED CHIPSET FEATURES〞from the main menu, the screen shown as below.

Phoenix - AwardBIOS CMOS Setup Utility

Advanced Chipset Features

DRAM Timing Selectable		[By SPD]	Item Help
X CAS Latency Time		[2.5]
Active to Precharge Delay		[7]
X DRAM RAS# to CAS# Delay		[3]	Menu Level ►
X DRAM RAS# Precharge		[3]
DRAM Data Integrity Mode		[Non-ECC]
System BIOS Cacheable		[Enabled]
Video BIOS Cacheable		[Disabled]
Memory Hole At 15M-16M		[Enabled]
Delayed Transaction		[Enabled]
AGP Aperture Size (MB)		[64]
** VGA Setting **
On-Chip VGA		[Enabled]
On-Chip Frame Buffer Size		[32MB]
Boot Display		[CRT+LFP]
PCI SERR# NMI		[Disabled]
↑↓→←: Move Enter: Select	+/-/PU/PD:Value F10:Save ESC:Exit F1:General Help
F5: Previous Values	F6: Fail-Safe Defaults F7:Optimized Defaults

Chipset Features Setup Screen

This parameter allows you to configure the system based on the specific features of the installed chipset. The chipset manages bus speed and access to system memory resources, such as DRAM and the external cache.

It also coordinates communications between conventional ISA bus and the PCI bus. It must be stated that these items should never need to be altered. The default settings have been chosen because they provide the best opera- ting conditions for the system. The only time you might consider making any changes would be if you discovered that data was being lost while using your system.

PPC-7508F USER′S MANUAL Page: 4-11