Intel S5000XAL Appendix a Integration and Usage Tips, 84Revision Intel order number D31979-007

Appendix A: Integration and Usage Tips Intel® Server Board S5000PAL TPS

Appendix A: Integration and Usage Tips

ƒWhen adding or removing components or peripherals from the server board, AC power must be removed. With AC power plugged into the server board, 5-volt standby is still present even though the server board is powered off.

ƒWhen two processors are installed, both must be of identical revision, core voltage, and bus/core speed. Mixed processor steppings is supported. However, the stepping of one processor can not greater then one stepping back of the other.

ƒProcessors must be installed in order. CPU 1 is located near the edge of the server board and must be populated to operate the board.

ƒOn the back edge of the server board are four diagnostic LEDs which display a sequence of red, green, or amber POST codes during the boot process. If the server board hangs during POST, the LEDs will display the last POST event run before the hang.

ƒOnly Fully Buffered DIMMs (FBD) are supported on this server board. For a list of supported memory for this server board, see the Intel® Server Board S5000PAL / S5000XAL Tested Memory List.

ƒFor a list of Intel supported operating systems, add-in cards, and peripherals for this server board, see the Intel® Server Board S5000PAL / S5000XAL Tested Hardware and OS List.

ƒOnly Dual-Core Intel® Xeon® processors 5000 sequence, with system bus speeds of 667/1066/1333 MHz are supported on this server board. Previous generation Intel® Xeon® processors are not supported.

ƒFor best performance, the number of DIMMs installed should be balanced across both memory branches. For example: a four DIMM configuration will perform better than a two DIMM configuration and should be installed in DIMM Slots A1, B1, C1, and D1. An eight DIMM configuration will perform better then a six DIMM configuration.

ƒThere are no population rules for installing a single low profile add-in card in the 2U LP riser card; a single add in card can be installed in either PCI Express* slot. While each slot can accommodate a x8 card, each slot will only support x4 bus speeds.

ƒFor the 2U PCI-X* (passive) riser card, add-in cards should be installed starting with the top slot first, followed by the middle, and then the bottom. Any add-in card populated in the bottom PCI slot will cause the bus to operate at 66MHz.

ƒEach PCI slot on the 2U PCI-X* (active) riser card operates on an independent PCI bus. Therefore, using an add-in card that operates below 133MHz will not affect the bus speed of the other PCI slots.

ƒThe IDE connector on this server board is NOT a standard 40-pin IDE connector. Instead, this connector has an additional 4 power pins over and above the standard 40 I/O pins. The design intent of this connector is to provide support for a slim-line optical drive only.

ƒRemoving AC Power before performing the CMOS clear operation will cause the system to automatically power up and immediately power down after the procedure is followed and AC power is re-applied. Should this occur, remove the AC power cord again, wait 30 seconds, and re-install the AC power cord. Power up system and proceed to the <F2> BIOS setup utility to reset desired settings.

ƒNormal BMC functionality is disabled with the force BMC update jumper set to the “enabled” position (pins 2-3). The server should never be run with the BMC force update jumper set in this position and should only be used when the standard firmware update process fails. This jumper should remain in the default (disabled) position (pins 1-2) when the server is running normally.

ƒWhen performing a BIOS update procedure, the BIOS select jumper must be set to its default position (pins 2-3).

ƒWhen AC power is applied to the server, a 25-30 second delay is necessary to initialize the BMC. During this initialization period, the Power Button functionality is disabled.

84Revision 1.4

Intel order number: D31979-007