Kenwood TK-940 service manual Pll, Buff IRF AMP, Vcxo, DET Invsw

CIRCUIT DESCRIPTION

5 . Frequency Synthesizer Unit

5-1. PLL

The frequency synthesizer consists of a VCXO i X l ) , and a VCO circuit, PLL circuit, and peripheral circuits.

The VCXO generates 12.8MHz. The frequency sta- bility IS withiri i 2 . 5 p p m (TK-940), i I.5pprn (TK-941) within the temperatdre range of -30 to 160°C. l ~ h i s output enters the PLL C (ICI), and is divided by 1024 t o produce a 12.5kHz reference signal.

The VCO output from the buffer amplifier (052) is

doub!ed by 053, amplified by buffer amplifier 0 3 , and rlIC209 D&A irl __ .,__ Us

PLL LPF - at - VCO

sen: t o the PLL IC ilC1). The phase of this signal is compared with ?he 12.5kHz reference signal in IC1 The output from the phase coniparator goes through the charge pump (In I C l ) and low-pass filter, and on to the varactor diodes (D51 and D52) in the VCO unit, keeping t h e VCO frequency constant . The other output from Q53 is amplified by the RF amplifier iQ181, and output to the transmit or receive unit vla the RF switch (D17).

		I
Q52	Q53	I	018	D l 7
- BUFF	- X2	IRF		r:
		I	AMP	1 %

_I- -

I-----------PLLJVCOUNIT-------_1

X I 12.8MHzI IC6

MB

VCXO

FC IC8 (212)

Fig. 5 PLL unit block diagram

5-2.PLL unlock

When the PLL is unlocked, the lock detect signal (LD) of the PLL IC (ICI) is rectified by D l and Q2, and converted to a DC signal This signal cuts off the power to the RF swltch iD17) and drive module (ICI2), stopping unnecessary transmission

DET

Q9

LD

INVSW

Fig. 6 P,LL unlock circuit