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Note: The + 3.3 V pins are tied together and decoupled with high frequency bypass capacitors to ground. No current from these 3.3 V pins is used on the board. The PCI portion of the LSI53C875J chip is powered from the 3 V/5 V pins.
Table 3.2 PCI Connector JI (Top)Signal Name1 | Pin | Signal Name1 | Pin | Signal Name1 | Pin | Signal Name1 | Pin |
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1 | GND | 17 | C_BE2/ | 33 | GND | 49 | |
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TCK | 2 | REQ/ | 18 | GND | 34 | KEYWAY | 50 |
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GND | 3 | 3 V/5 V | 19 | IRDY/ | 35 | KEYWAY | 51 |
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TDO | 4 | AD31 | 20 | +3.3 V | 36 | AD08 | 52 |
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+5 V | 5 | AD29 | 21 | DEVSEL/ | 37 | AD07 | 53 |
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+5 V | 6 | GND | 22 | GND | 38 | +3.3 V | 54 |
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INTB/ | 7 | AD27 | 23 | LOCK/ | 39 | AD05 | 55 |
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INTD/ | 8 | AD25 | 24 | PERR/ | 40 | AD03 | 56 |
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GND (PRSNT1/) | 9 | +3.3 V | 25 | +3.3 V | 41 | GND | 57 |
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RESERVED | 10 | C_BE3/ | 26 | SERR/ | 42 | AD01 | 58 |
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GND (PRSNT2/) | 11 | AD23 | 27 | +3.3 V | 43 | 3 V/5 V | 59 |
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KEYWAY | 12 | GND | 28 | C_BE1/ | 44 | ACK64/ | 60 |
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KEYWAY | 13 | AD21 | 29 | AD14 | 45 | +5 V | 61 |
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RESERVED | 14 | AD19 | 30 | GND | 46 | +5 V | 62 |
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GND | 15 | +3.3 V | 31 | AD12 | 47 |
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CLK | 16 | AD17 | 32 | AD10 | 48 |
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1. Shaded signals are not connected.
Technical Specifications |