LVD SCSI | Low Voltage Differential. LVD is a robust design methodology that |
| improves power consumption, data integrity, cable lengths and support |
| for multiple devices, while providinga migration path for increased I/O |
| performance. |
Mainboard | A large circuit board that holds RAM, ROM, the microprocessor, custom |
| integrated circuits, and other components that make a computer work. It |
| also has expansion slots for host adapters and other expansion boards. |
Main Memory | The part of a computer’s memory which is directly accessible by the CPU |
| (usually synonymous with RAM). |
Mbyte | Megabyte. A measure of computer storage equal to 1024 kilobytes. |
Motherboard | See Mainboard. In some countries, the term Motherboard is not |
| appropriate. |
Multitasking | The executing of more than one command at the same time. This allows |
| programs to operate in parallel. |
Multithreading | The simultaneous accessing of data by more than one SCSI device. This |
| increases the data throughput. |
NVRAM | NonVolatile Random Access Memory. Actually an EEPROM |
| (Electronically Erasable Read Only Memory chip) used to store |
| configuration information. See EEPROM. |
A program that organizes the internal activities of the computer and its peripheral devices. An operating system performs basic tasks such as moving data to and from devices, and managing information in memory. It also provides the user interface.
Parity Checking | A way to verify the accuracy of data transmitted over the SCSI bus. The |
| parity bit in the transfer is used to make the sum of all the 1 bits either |
| odd or even (for odd or even parity). If the sum is not correct, the |
| information may be retransmitted or an error message may appear. |
Passive | The electrical connection required at each end of the SCSI bus, |
Termination | composed of a set of resistors. It improves the integrity of bus signals. |
PCI | Peripheral Component Interconnect. A local bus specification that allows |
| connection of peripherals directly to computer memory. It bypasses the |
| slower ISA and EISA buses. |
Glossary of Terms and Abbreviations |