2.The second option, “Monitor Mixer,” connects the S/PDIF Out port to the outputs of the Delta 66 monitor mixer. For more information on the capabilities of the monitor mixer, please see the section “Monitor Mixer Page.”
3.The third option, “S/PDIF In,” connects the S/PDIF Out port directly to the hardware S/PDIF input on the Delta 66 PCI host card. The left channel of the S/PDIF In is routed to the left channel of S/PDIF Out and the right channel of the S/PDIF In is routed to the right channel of S/PDIF Out.
4.The fourth option, “S/PDIF In (L/R Rev.),” functions identically to the third option, except that the left and right channels are swapped. Therefore in this mode, the left channel of the S/PDIF In is routed to the right channel of S/PDIF Out and the right channel of the S/PDIF In is routed to the left channel of S/PDIF Out.
5.Selections five and six connect the hardware analog inputs 1 & 2 or 3 & 4 (respectively) directly to the Delta 66’s S/PDIF Out port. For example, if “H/W In 1/2” were selected, any signal present at the IN1 port will be sent to the left channel of the S/PDIF Out, and any signal present at the IN2 port will be sent to the right channel of the S/PDIF Out. This same behavior applies to “H/W In 3/4” when selected.
At this point, you may begin to realize the versatility of the Monitor Mixer and the Patchbay/Router, and the relationship between the two. You may want to
Hardware Settings Page
The Hardware Settings page of the Delta Control Panel gives you control over miscellaneous features of the Delta 66. To display this page, click the “Hardware Settings” tab of the Delta Control Panel.
MASTER CLOCK: This section allows you to select the source of the board’s
master clock: Internal Xtal (crystal) or S/PDIF In. Master clock operation is outlined in the Synchronization section of this manual. Internal Xtal is the default setting. Be sure to select “S/PDIF In” if you will be recording or monitoring an S/PDIF stream.
NOTE: If “S/PDIF In” is selected as the master clock source, be sure to supply a valid S/PDIF signal to the board’s active S/PDIF input. Otherwise, erratic timing and/or improper sample rates will be experienced.
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