Ultra DMA Timing | Maxtor 90750D3, 91024D4, 91280D5, 91536D6, 91792D7

AT INTERFACE DESCRIPTION

Ultra DMA Timing

TIMING PARAMETERS (all times in nanoseconds)		MODE 0		MODE 1		MODE 2

		MIN	MAX	MIN	MAX	MIN	MAX
t	Cycle Time (from STROBE edge to STROBE edge)	114		75		55
CYC
t2	Two cycle time (from rising edge to next rising edge or	235		156		117
CYC	from falling edge to next falling edge of STROBE)	235		156		117
	from falling edge to next falling edge of STROBE)
t	Data setup time (at recipient)	15		10		7	70
DS
t	Data hold time (at recipient)	5		5		5
DH
t	Data valid setup time at sender (time from data bus being	70		48		34	5
DVS	valid until STROBE edge)	70		48		34	5
	valid until STROBE edge)
t	Data valid hold time at sender (time from STROBE edge	6		6		6	20
DVH	until data may go invalid)	6		6		6	20
	until data may go invalid)

t	First STROBE (time for device to send first STROBE)	0	230	0	200	0	170
FS
t	Limited interlock time (time allowed between an action by
LI	one agent, either host or device, and the following action	0	150	0	150	0	150
	one agent, either host or device, and the following action	0	150	0	150	0	150
	by the other agent)

t	Interlock time with minimum	20		20		20
MLI
t	Unlimited interlock time	0		0		0
UI
t	Maximum time allowed for outputs to release		10		10		10
AZ
t	Minimum delay time required for output drivers turning on	20		20		20
ZAH	Minimum delay time required for output drivers turning on
t	(from released state)	0		0		0
ZAD
t	Envelope time (all control signal transitions are within the	20	70	20	70	20	70
ENV	DMACK envelope by this much time)	20	70	20	70	20	70
	DMACK envelope by this much time)
t	STROBE to DMARDY (response time to ensure the		50		30		20
SR	synchronous pause case when the recipient is pausing)		50		30		20
	synchronous pause case when the recipient is pausing)

t	Ready-to-final-STROBE time (no more STROBE edges may		75		60		50
RFS	be sent this long after receiving DMARDY- negation)		75		60		50
	be sent this long after receiving DMARDY- negation)

t	Ready-to-pause time (time until a recipient may assume	160		125		100
RP	that the sender has paused after negation of DMARDY-)	160		125		100
	that the sender has paused after negation of DMARDY-)

t	Pull-up time before allowing IORDY to be released		20		20		20
IORDYZ
t	Minimum time device shall wait before driving IORDY	0		0		0
ZIORDY
t	Setup and hold times before assertion and negation of	20		20		20
ACK	DMACK-	20		20		20
	DMACK-
t	Time from STROBE edge to STOP assertion when the	50		50		50
SS	sender is stopping	50		50		50
	sender is stopping

DMARQ
(device)
tUI
DMACK-
(host)
tACK	tFS
tACK	tENV
STOP	tZAD
STOP
(host)
tACK	tFS
tACK	tENV
HDMARDY-
(host)	tZAD
	tZAD
tZIORDY
DSTROBE
(device)
tAZ	tVDS	tDVH
DD(15:0)
tACK
DA0, DA1, DA2,
CS0-, CS1-
	Figure 5 - 4

Initiating an Ultra DMA Data In Burst

5 – 26

Image 37

Maxtor 90750D3, 91024D4, 91280D5, 91536D6, 91792D7, 92048D8 manual Ultra DMA Timing, Timing Parameters all times in nanoseconds

Contents

HA RD Drive Produc T MA Nual DiamondMax Plus Revisions Manual No U T I O N Before You Begin Contents Handling and Installation Product Specifications Host Software Interface AT Interface Description Service and Support Interface CommandsGlossary Figures Maxtor Corporation IntroductionManual Organization Abbreviations Conventions Signal ConventionsKey Words Numbering Product Description DiamondMax Plus 5120 Key Features Functional / Interface Product Features Logical Block Addressing On-the-Fly Hardware Error Correction Code ECCDefect Management Zone DMZ Software ECC Correction Cache Management Read-Ahead ModeBuffer Segmentation Automatic Write Reallocation AWR Major HDA Components Jumper Location/Configuration Subsystem ConfigurationCylinder Limitation Dual Drive Support Drive Configuration Product SpecificationsPerformance Specifications Models and Capacities Parameter Standard Metric Physical Dimensions Power Mode Definitions Power RequirementsEPA Energy Star Compliance Environmental Limits Shock and Vibration Reliability Specifications Radiated Electromagnetic Field Emissions EMC Compliance Safety Regulatory ComplianceCanadian Emissions Statement Hard Drive Handling Precautions Handling and InstallationPre-formatted Drive Important Notice Multi-pack Shipping Container Unpacking and Inspection Recommended Mounting Configuration Physical InstallationRepacking Before You Begin General Requirements Mounting Drive in System Attaching Interface Power Cables System Setup Hard Drive Preparation System Hangs During Boot Signal Interface ConnectorAT Interface Description Pin Description Summary Pin Description Table PIN Name Signal Name Signal Description PIO Timing Timing Parameters Mode DMA Timing Timing Parameters all times in nanoseconds Ultra DMA Timing Sustained Ultra DMA Data In Burst Device Terminating an Ultra DMA Data In Burst Initiating an Ultra DMA Data Out Burst Device Pausing an Ultra DMA Data Out Burst Device Terminating an Ultra DMA Data Out Burst Features Register Error RegisterHost Software Interface Task File Registers Sector Number Register Sector Count RegisterCylinder Number Registers Device/Head Register Command Register Summary Command Name Command Code Parameters Used SDH Alternate Status Register Control Diagnostic RegistersDevice Control Register Digital Input Register Reset Handling Reset and Interrupt HandlingInterrupt Handling Set Feature Commands Interface Commands Read Sectors Read CommandsRead Verify Sectors Read Multiple Read DMA Set Multiple Mode Write CommandsWrite Sectors Write Verify Sectors Write DMA Write Multiple Set Features Mode Set Feature Commands Power Mode Commands Sleep Mode Identify Drive Initialization Commands 15-8 = PIO data transfer mode = Write Cache enabled Initialize Drive Parameters Execute Drive Diagnostic Seek, Format and Diagnostic CommandsFormat Track Execute S.M.A.R.T A.R.T. Command Set Service Policy Service and SupportNo Quibble Service Support Customer Service MaxFax ServiceInternet Glossary Direct Memory Access Direct AccessError Correction Code ECC Error Free Head Disk Assembly HDA Hard ErrorFile Allocation Table FAT Flux Changes PER Inch Logical Address Phase Locked Loop PLLLogical Block Addressing Logical Sector Read Gate Signal Random Access Memory RAMRecoverable Error Sector Pulse Signal Unrecoverable Error UN-CORRECTABLE ErrorWrite Gate Signal THIN-FILM Media