Maxtor 90750D3, 91024D4, 91280D5, 91536D6, 91792D7, 92048D8 Figure 5 - 13 Device Terminating an Ultra DMA Data Out Burst

AT INTERFACE DESCRIPTION

5 – 31

DMARQ

(device)

DMACK-

(host)

STOP

(host)

DDMARDY-

(device)

HSTROBE

(host)

DD(15:0)

(host)

DA0, DA1, DA2,

CS0-, CS1-

tACK

tMLI

tDVS

tLI

tACK

CRC

tDVH

tACK

tIORDYZ

tMLI

tRP

tRFS

Figure 5 - 13Device Terminating an Ultra DMA Data Out Burst

Contents

Main DiamondMax Plus 5120 92048D8, 91792D7, 91536D6, 91280D5, 91024D4 and 90750D3 Page Page Contents Section 1 Introduction Section 2 Product Description Section 3 Product Specifications Section 4 Handling and Installation Section 5 AT Interface Description Section 6 Host Software Interface Section 7 Interface Commands Section 8 Service and Support Glossary Figures Figure Title Page SECTION 1 Introduction Maxtor Corporation Manual Organization Abbreviations Conventions SECTION 2 Product Description DiamondMax Plus 5120 Key Features Product Features Functional / Interface Page Cache Management Major HDA Components Figure 2-1 PCBA Jumper Location and Configuration 4092 Cylinder Limitation Subsystem Configuration Jumper Location/Configuration PRODUCT SPECIFICATIONS 3 1 Product Specifications Drive Configuration Performance Specifications Models and Capacities LEDOM 8D840297D297196D635195D082194D420193D05709 yticapaCdettamroF Physical Dimensions Figure 3 - 1 Outline and Mounting Dimensions Power Requirements Power Mode Definitions EPA Energy Star Compliance Environmental Limits Reliability Specifications Shock and Vibration EMC/EMI Safety Regulatory Compliance SECTION 4 Handling and Installation Pre-formatted Drive Important Notice Hard Drive Handling Precautions Electro-Static Discharge (ESD) Page Page 4 15 1 IMPORTANT PLEASE READ! Handling Precautions P ( H H H 3 Identifying IDE Devices on the Interface Jumper Settings 2 System Hardware Requirements 4 Installing 5.25-inch Mounting Brackets and Rails Installing in a Device Bay Systems Using Cable Select Relationship to Other IDE Devices 5 and Power Cables 6 4 19 7 Setting the BIOS (CMOS) BIOS (CMOS) Parameters 4 20 8 4 21 9 5 22 SECTION 5 AT Interface Description Interface Connector Figure 5-1 Data Connector Pin Description Summary 5 23 Pin Description Table 5 24 PIO Timing Figure 5 - 2 PIO Data Transfer To/From Device 5 25 DMA Timing Figure 5 - 3 Multi-word DMA Data Transfer 5 26 Ultra DMA Timing Figure 5 - 4 Initiating an Ultra DMA Data In Burst 5 27 Figure 5 - 5 Sustained Ultra DMA Data In Burst Figure 5 - 6 Host Pausing an Ultra DMA Data In Burst 5 28 Figure 5 - 7 Device Terminating an Ultra DMA Data In Burst Figure 5 - 8 Host Terminating an Ultra DMA Data In Burst 5 29 Figure 5 - 9 Initiating an Ultra DMA Data Out Burst Figure 5 - 10 Sustained Ultra DMA Data Out Burst 5 30 Figure 5 - 11 Device Pausing an Ultra DMA Data Out Burst Figure 5 - 12 Host Terminating an Ultra DMA Data Out Burst 5 31 Figure 5 - 13 Device Terminating an Ultra DMA Data Out Burst SECTION 6 Host Software Interface Task File Registers Page Command Register HOST SOFTWARE INTERFACE Summary 6 4 Control Diagnostic Registers Reset and Interrupt Handling SECTION 7 Interface Commands Read Commands Page Write Commands Page Set Feature Commands Power Mode Commands Page Initialization Commands INTERFACE COMMANDS 7 10 INTERFACE COMMANDS 7 11 Page Seek, Format and Diagnostic Commands S.M.A.R.T. Command Set SECTION 8 Service and Support Service Policy No Quibble Service Support Page GL 1 GLOSSARY Glossary A B C GL 2 D E F GL 3 G H I J K M N O P GL 5 R S GL 6 T U V W

Maxtor Figure 5 - 13 Device Terminating an Ultra DMA Data Out Burst

Models: 90750D3 91024D4 91280D5 91536D6 91792D7 92048D8

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