| Functional Details |
For example, you set an acquisition to have a scan rate of 100 kHz, which means each scan period is 10 µs. Within the scan period you sample six analog input channels. These are shown in the following figure as channels 1 through 6. The ADC conversion occurs at the beginning of each channel's 1 µs time block.
FIRSTPORTC
Figure 31. Example of FIRSTPORTC or DAC latency
By applying a setpoint on analog input channel 2, that setpoint gets evaluated every 10 µs with respect to the sampled data for channel 2.
Due to the pipelined architecture of the
The detection circuit works on data that is put into the acquisition stream at the scan rate. This data is acquired according to the
As a result, you can set a small detection window on a totalizing counter channel and have the detection setpoint "stepped over" since the scan period was too long. Even though the counter value stepped into and out of the detection window, the actual values going back to the PC may not. This is true no matter what mode the counter channel is in.
When setting a detection window, keep a scan period in mind. This applies to analog inputs and counter inputs. Quickly changing analog input voltages can step over a setpoint window if not sampled often enough.
There are three possible solutions for overcoming this problem:
Shorten the scan period to give more timing resolution on the counter values or analog values.
Widen the setpoint window by increasing limit A and/or lowering limit B.
A combination of both solutions (1 and 2) could be made.
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