4-5-3 CPU (LOGIC UNIT; IC1)
Pin | Port | Description | |
number | name | ||
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| Input port for the | |
1 | VIN | tion from connected battery pack or | |
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| external power supply. | |
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| Input port for remote control signals | |
2 | REMOTE | from an optional | |
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| via the [MIC] jack. | |
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3 | SD | Input port for the | |
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4 | CTCIN | Input port for CTCSS decoded sig- | |
nals. | |||
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5 | LOCKV | Input port for the PLL lock voltage. | |
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6 | THERMC | Input port for the tranceiver’s internal | |
temparature. | |||
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7 | SBATT | Input port for the VCC voltage (con- | |
nected battery voltage). | |||
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| Outputs control signal for the LCD | |
8 | CONT | contrast. | |
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| High : The LCD contrast is deep. | |
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9 | CTCOUT | Outputs CTCSS signals while trans- | |
mitting. | |||
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| Output port for: | |
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| • Beep audio signals while receiving. | |
10 | BEEP | • DTMF signals or 1750 Hz Europe | |
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| tone signal while transmitting. | |
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| [EUR], [ITA], [UK] | |
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| Input port for the bias control voltage | |
11 | BPCPI | to judge kinds of battery types. | |
High : Supply the bias control volt- | |||
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| age. | |
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| Input port for the noise signal (pulse- | |
12 | NOISE | type) from the IF IC (RF unit; IC 701, | |
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| pin 13). | |
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| Outputs data signals to the PLL IC2 | |
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| (RF unit; IC802, pin 4). | |
13 | PDA2/UL | Input port for the PLL unlock signal | |
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| from the PLL IC2 (RF unit; IC802, pin | |
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| 4). | |
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| Outputs data signals to the PLL IC1 | |
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| (RF unit; IC801, pin 5). | |
14 | PDA1/UL | Input port for the PLL unlock signal | |
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| from the PLL IC1 (RF unit; IC801, pin | |
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| 5). | |
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15 | DAST | Outputs strobe signals to the D/A IC | |
(LOGIC unit; IC5, pin2). | |||
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16 | IOST | Outputs strobe signals to the I/O IC | |
(RF unit; IC2, pin 1 and IC3, pin 1). | |||
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17 | PLST2 | Outputs strobe signals to the PLL IC2 | |
(RF unit, IC802, pin5). | |||
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18 | PLST1 | Outputs strobe signals to the PLL IC1 | |
(RF unit, IC801, pin 3). | |||
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19 | CLONEOUT | Output port for the cloning signal. | |
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Pin | Port | Description | |
number | name | ||
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20 | CLONEIN | Input port for the cloning signal. | |
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21 | TXC | Outputs T4 regulator control signal. | |
High : While transmitting. | |||
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22 | R3C | Outputs R3 regulator control signal. | |
High : While receiving. | |||
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23 | CPUHV | Input port for the reset signal from | |
Q151 (LOGIC unit). | |||
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| Outputs control signal for charger cir- | |
24 | CHGC | cuit (RF unit; Q5). | |
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| High : While battery is charging. | |
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| Outputs control signal for the AF | |
25 | AFON | amplifier requlator circuit. | |
High : Activates the AF amplifier cir- | |||
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| cuit. | |
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26 | PCON | Outputs +3C regulator control signal | |
(LOGIC unit; Q142 and Q145). | |||
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| Outputs control signal for the Europe | |
27 | TCON | tone and DTMF. | |
Low : Activates the Europe tone. | |||
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| High : Activates DTMF. | |
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28 | BLED | Outputs BUSY LED control singal. | |
Low : The BUSY LED is ON. | |||
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29 | LIGHT | Outputs LCD backlight control signal. | |
High : Lights ON. | |||
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| Outputs control signal for the regulator | |
30 | MICC | secton of MIC amplifier (LOGIC unit; | |
IC301). | |||
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| Low : Activates the MIC amplifier | |
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| circuit. | |
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| Outputs AF mute and MIC mute con- | |
31 | RM/MM | trol signals. | |
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| High : Mute is ON. | |
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32 | POWER | Input port for the [POWER] switch. | |
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33 | RESET | Input port for the RESET signal from | |
IC142, pin 1 (LOGIC unit). | |||
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39 | PTT | Input port for the [PTT] switch. | |
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| Outputs clock signal to the PLL IC1 | |
41 | CK | (IC801), PLL IC2 (IC802), D/A IC (IC5) | |
, I/O IC (IC2, IC3) on the RF unit and | |||
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| EEPROM IC (LOGIC unit; IC2). | |
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42 | ESIO | Data bus line for the EEPROM | |
(LOGIC unit; IC2). | |||
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Input ports for key matrix. | |||
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47, 48 | I1, I2 | Input ports for Initial matrix. | |
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Outputs port for key matrix. | |||
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55, 56 | DICK, | Input port for the up/down signal from | |
DIUK | the main dial (LOGIC unit; S1). | ||
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