Chapter 4 VME-MXI-2 Configuration andInstallation
© National Instruments Corporation 4-3 PCI-MXI-2 for Linux
Front Panel Features
The VME-MXI-2 has the following front panel features:
•Three front panel LEDs
–SYSFAIL LED indicates that the VMEbus SYSFAIL line is
asserted.
–MXI LED indicates when the VME-MXI-2 is accessed from
the MXIbus.
–VME LED indicates when the VME-MXI-2 is accessed from
theV MEbus.
•MXIbus connector
•System reset pushbutton
VMEbus A16 Base Address
The VME-MXI-2 requires 64 bytes of A16 space for its configuration
registers. It uses the logical address scheme of the VXIbus specification,
inw hich each device is assigned an 8-bit value called the logical address.
This logical address allocates 64 bytes of space to the device within the
upper quarter of A16 space. The VME-MXI-2 cannot be configured to
locate its registers in the lower three quarters of A16 space. The A16 base
address of the VME-MXI-2 will be address lines15 and 14 high with
address lines 13 through 6 matching the logical address of the
VME-MXI-2, and address lines 5 through 0 low. In other words, the
A16base address of the VME-MXI-2 module’s 64-byte regi ster set is
ascalculated below:
The factory-default logical address for the VME-MXI-2 is 1, which locates
the registers in the range C040 hex to C07F hex. You can change the logical
address of the VME-MXI-2 by changing the setting of the 8-bit DIP switch
at location designator U20. The ON position of the DIP switch corresponds
to a logic value of 0, and the OFF position corresponds to a logic value of1.
Allowable logical addresses for the VME-MXI-2 range from 1 to 254
(hexFE). Verify that no other devices in your system use the A16 address
space for the VME-MXI-2. If possible, configure all other VMEbus A16
devices to be located within the lower three quarters of A16 space. Also,
when setting base addresses, keep in mind the grouping requirements set by
the system hierarchy. Refer to VXI-6, VXIbus Mainframe Extender
Specification, for more information on setting base addresses on a
multimainframe hierarchy.
base address C000 hex (logical address) +40 hex×=