Chapter 10 Digital Routing and Clock Generation
© National Instruments Corporation 10-9 NI 6232/6233 User Manual
An M Series device is not a Star Trigger controller. An M Series device
may be used in the first peripheral slot of a PXI system, but the system will
not be able to use the Star Trigger feature.
PXI_STAR Filters
You can enable a programmable debouncing filter on each PFI, RTSI, or
PXI_STAR signal. When the filters are enabled, your device samples the
input on each rising edge of a filter clock. M Series devices use an onboard
oscillator to generate the filter clock with a 40 MHz frequency.
Note NI-DAQmx supports only filters on counter inputs.
The following is an example of low-to-high transitions of the input signal.
High-to-low transitions work similarly.
Assume that an input terminal has been low for a long time. The input
terminal then changes from low-to-high, but glitches several times. When
the filter clock has sampled the signal high on N consecutive edges, the
low-to-high transition is propagated to the rest of the circuit. The value of
N depends on the filter setting; refer to Table 10-3.
The filter setting for each input can be configured independently. On power
up, the filters are disabled. Figure 10-4 shows an example of a low-to-high
transition on an input that has its filter set to 125 ns (N = 5).
Table 10-3. Filters
Filter Setting
N (Filter
Clocks Needed
to Pass Signal)
Pulse Width
Guaranteed to
Pass Filter
Pulse Width
Guaranteed to
Not Pass Filter
125 ns 5125 ns 100 ns
6.425 µs 257 6.425 µs 6.400 µs
2.55 ms ~101,800 2.55 ms 2.54 ms
Disabled — — —