Chapter 3 Hardware Overview
© National Instruments Corporation 3-5 NI PXIe-6672 User Manual

Connectors

This section describes the connectors on the front panel of the
NIPXIe-66 72.
•CLKIN—Clock Input. This connector supplies the module with
aclock that can be programmatically routed to the onboard PLL
foruse as a reference or routed directly to the PXI backplane
(PXI_CLK10_IN) for distribution to the other modules in the chassis.
•CLKOUT—Clock Output. This connector is used to source
a clock that can be routed programmatically from the
temperature-compensated crystal oscillator (TCXO), direct
digital synthesis (DDS), or backplane clock (PXI_CLK10).
•PFI <0..5>—Programmable Function Interface <0..5>. These
connectors can be used for either input or output. Additionally, PFI0
can be used as a clock input for internally synchronizing other signals.
Refer to the Synchronous Routing section for more information about
this functionality. You can program the behavior of these PFI
connections individually.
Refer to Figure 3-2 for a diagram showing the locations of these
connections on the NI PXIe-6672 front panel.
Caution Connections that exceed any of the maximum ratings of input or output signals
on the NI PXIe-6672 can damage the module and the computer. NI is not liable for any
damage resulting from such signal connections.
Hardware Features
The NIPXIe-667 2 perform two broad functions:
• Generating clock and trigger signals
• Routing internally or externally generated signals from one location
to another