National Instruments NI PXIe-6672 N, O, P

Index

© National Instruments Corporation I-3 NI PXIe-6672 User Manual

N

National Instruments support and

services, B-1

NI PXI-6653, parts locator diagram, 3-3

NI PXI-665x

configuration, 2-2

connectors, 3-5

functional overview, 3-5

installation

hardware, 2-1

software, 2-1

NI support and services, B-1

O

operating environment specifications, A-6

P

PFI

PFI <0..5> connector

description, 3-5

location (diagram), 3-3

signal description (table), 3-6

PFI <0..5> signals

asynchronous routing, 3-16

front panel PFIs as inputs, 3-12

front panel triggers as outputs, 3-13

specifications, A-3

using front panel PFIs as inputs, 3-12

using front panel PFIs as outputs, 3-13

PFI synchronization clock

possible sources, 3-13

using front panel PFIs as outputs, 3-13

phase-locked loop. See PLL

physical specifications, A-5

PLL

Active LED, 3-4

routing from the CLKIN connector, 3-5

using the PXI_CLK10 PLL, 3-19

power requirement specifications, A-6

programmable function interface. See PFI

programming examples (NI resources), B-1

PXI backplane clock, 3-8

PXI star trigger bus. See PXI_STAR <0..12>

PXI star triggers, front panel triggers as

outputs, 3-13

PXI trigger bus. See PXI_TRIG <0..7>

PXI triggers

front panel triggers as outputs, 3-13

PXI_CLK10

Active LED, 3-4

clock generation, 3-8

DDS phase-lock, 3-6

front panel triggers as outputs, 3-13

using front panel PFIs as outputs, 3-13

using the PXI triggers, 3-14

using the PXI_CLK10 PLL, 3-19

PXI_CLK10 and TCXO, 3-8

PXI_CLK10 phase

calibration, 4-1

PXI_CLK10_IN

routing from the CLKIN connector, 3-5

signal description (table), 3-6

PXI_CLK10_OUT

signal description (table), 3-6

PXI_STAR <0..12>

asynchronous routing, 3-16

signal description (table), 3-6

specifications, A-4

using front panel PFIs as outputs, 3-13

using the PXI star triggers, 3-15

using the PXI triggers, 3-14

PXI_TRIG <0..7>

asynchronous routing, 3-16

signal description (table), 3-6

specifications, A-5

using front panel PFIs as outputs, 3-13

using the PXI star triggers, 3-15

using the PXI triggers, 3-14

Contents

Main Page Important Information Warranty Copyright Trademarks Patents Contents Page About This Manual Conventions National Instruments Documentation Related Documentation Introduction What You Need to Get Started Unpacking Software Programming Choices Safety Information Page Installing and Configuring Installing the Software Installing the Hardware Configuring the Module Page Figure 3-1. Functional Overview of the NI PXIe-6672 NI PXIe-6672 Front Panel Figure 3-2 shows the connectors and LEDs on the front panel of the NIPXIe-66 72. 5 Figure 3-2. NI PXIe-6672 Front Panel 1 2 3 4 Access LED Active LED Connectors Hardware Features Page Clock Generation Direct Digital Synthesis (DDS) PXI_CLK10 and TCXO Routing Signals Figure 3-3. High-Level Schematic of NI PXIe-6672 SignalRouting Architecture Determining Sources and Destinations Using Front Panel PFIs As Inputs Using Front Panel PFIs As Outputs Using the PXI Triggers Using the PXI Star Triggers Choosing the Type of Routing Asynchronous Routing Synchronous Routing Generating a Single Pulse (Global Software Trigger) Using the PXI_CLK10 PLL Page Calibration Factory Calibration TCXO Frequency PXI_CLK10 Phase DDS Start Trigger Phase Page A Specifications CLKIN Characteristics CLKOUT Characteristics PFI <0..5> Input Characteristics Output Characteristics PXI_STAR Trigger Characteristics PXI Trigger Characteristics TCXO Characteristics DDS Characteristics Physical Power Requirements Environment Operating Environment Storage Environment Shock and Vibration Safety Electromagnetic Compatibility CE Compliance Environmental Management Waste Electrical and Electronic Equipment (WEEE) RoHS B Technical Support and Professional Services Page Glossary Symbols A B C D Page Page P S T V Index A B C D E F G H I N O P R S T