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National Instruments NI PXIe-6672 Figure 3-3. High-Level Schematic of NI PXIe-6672 SignalRouting Architecture

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Chapter 3 Hardware Overview

NI PXIe-6672 User Manual 3-10 ni.com

Figures 3-3 and 3-4 summarize the routing features of the NI PXIe-6672. The remainder of this chapter details the capabilities and constraints of the routing architecture.

Figure 3-3. High-Level Schematic of NI PXIe-6672 SignalRouting Architecture

PFI 0

DDS

PXI_CLK10 ÷2N

÷2M

PFI 0

DDS

PXI_CLK10 ÷2N

÷2M

Selection

Circuitry

Selection

Circuitry

PFI 0

PFI 1

PFI 5 Selection

Circuitry Selection

Circuitry

Selection

Circuitry

Selection

Circuitry

Selection

Circuitry

PXI_TRIG 0

PXI_TRIG 1

PXI_TRIG 7

Selection

Circuitry

Selection

Circuitry

SYNCHRONIZATION

CLOCKS for PFI<0..5>

SOURCE*

*PXI_STAR<0..16>,

PXI_TRIG<0..7>,

PFI<0..5>, and

Software Trigger are

routed to SOURCE

of each Selection

Circuitry block.

SYNCHRONIZATION

CLOCKS for

PXI_STAR<0..16> and

PXI_TRIG<0..7>

PXI_STAR 0

PXI_STAR 1

PXI_STAR 16

CLKIN

Contents

Main Page Important Information Warranty Copyright Trademarks Patents Contents Page About This Manual Conventions National Instruments Documentation Related Documentation Introduction What You Need to Get Started Unpacking Software Programming Choices Safety Information Page Installing and Configuring Installing the Software Installing the Hardware Configuring the Module Page Figure 3-1. Functional Overview of the NI PXIe-6672 NI PXIe-6672 Front Panel Figure 3-2 shows the connectors and LEDs on the front panel of the NIPXIe-66 72. 5 Figure 3-2. NI PXIe-6672 Front Panel 1 2 3 4 Access LED Active LED Connectors Hardware Features Page Clock Generation Direct Digital Synthesis (DDS) PXI_CLK10 and TCXO Routing Signals Figure 3-3. High-Level Schematic of NI PXIe-6672 SignalRouting Architecture Determining Sources and Destinations Using Front Panel PFIs As Inputs Using Front Panel PFIs As Outputs Using the PXI Triggers Using the PXI Star Triggers Choosing the Type of Routing Asynchronous Routing Synchronous Routing Generating a Single Pulse (Global Software Trigger) Using the PXI_CLK10 PLL Page Calibration Factory Calibration TCXO Frequency PXI_CLK10 Phase DDS Start Trigger Phase Page A Specifications CLKIN Characteristics CLKOUT Characteristics PFI <0..5> Input Characteristics Output Characteristics PXI_STAR Trigger Characteristics PXI Trigger Characteristics TCXO Characteristics DDS Characteristics Physical Power Requirements Environment Operating Environment Storage Environment Shock and Vibration Safety Electromagnetic Compatibility CE Compliance Environmental Management Waste Electrical and Electronic Equipment (WEEE) RoHS B Technical Support and Professional Services Page Glossary Symbols A B C D Page Page P S T V Index A B C D E F G H I N O P R S T