
Appendix A Specifications
NI PXIe-6672 User Manual A-2 ni.com
Jitter added to CLKIN
Without PLL....................................0.5 psrms, 10 Hz to 100 kHz,
typical
With PLL.........................................0.6 psrms, 10 Hz to 100 kHz,
typical
Duty cycle distortion of CLKIN to
PXI_CLK10_IN without PLL................±1%, max
Required input duty cycle
when using PLL......................................45 to 55%
CLKOUT CharacteristicsOutput frequency
From PXI_CLK10...........................10 MHz
From TCXO.....................................10MHz
From DDS.......................................1 MHz1 to 105 MHz
Duty cycle...............................................43 to 55%2
Output impedance...................................50 Ω, nominal
Output coupling......................................AC
Amplitude, software configurable to two voltage levels
(low and high drive)
1 The lower limit is load dependent because of the AC coupling. This limit is less than 1MHz f or high-impedance loads.
2 The duty cycle specification covers both DDS range and TCXO.
Open Load Square Wave
Low Drive 2.0Vp-p, typical
High Drive 5.0Vp-p, typical
50Ω Load Square Wave
Low Drive 1.0Vp-p, typical
High Drive 2.5Vp-p, typical