Chapter 7 | Analog Output |
The source also can be one of several other internal signals on your DAQ device. Refer to Device Routing in MAX in the
You also can specify whether the samples are paused when ao/PauseTrigger is at a logic high or low level.
AO Sample Clock Signal
Use the AO Sample Clock (ao/SampleClock) signal to initiate AO samples. Each sample updates the outputs of all of the DACs. You can specify an internal or external source for ao/SampleClock. You also can specify whether the DAC update begins on the rising edge or falling edge of ao/SampleClock.
Using an Internal Source
One of the following internal signals can drive ao/SampleClock.
•AO Sample Clock Timebase (divided down)
•Counter n Internal Output
A programmable internal counter divides down the AO Sample Clock
Timebase signal.
Using an External Source
Use the external signals PFI <0..3> or PFI <8..11> as the source of ao/SampleClock.
Routing AO Sample Clock Signal to an Output
Terminal
You can route ao/SampleClock (as an active low signal) out to any
PFI <4..7> or PFI <12..15> terminal.
Other Timing Requirements
A counter on your device internally generates ao/SampleClock unless you select some external source. ao/StartTrigger starts the counter and either the software or hardware can stop it once a finite generation completes. When using an internally generated ao/SampleClock, you also can specify a configurable delay from ao/StartTrigger to the first ao/SampleClock pulse. By default, this delay is two ticks of ao/SampleClockTimebase.
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