Chapter 2 Configuration and Installation
SCXI-1121 User Manual 2-38 www.natinst.com
Rear Signal Connector Signal Descriptions Pin Signal Name Description
1-2 AOGND Analog Output Ground—These pins are connected to the analog
reference when jumper W33 is in position AB-R0.
3-12 MCH0± through
MCH4± Analog Output Channels 0 through 4—Connects to the data
acquisition board differential analog input channels.
19 OUTREF Output Reference—This pin serves as the reference node for the
analog channels output in the Pseudodifferential Reference mode.
It should be connected to the analog input sense of the NRSE data
acquisition board.
24, 33 DIG GND Digital Ground—These pins supply the reference for data
acquisition board digital signals and are tied to the module digital
ground.
25 SERDATIN Serial Data In—This signal taps into the SCXIbus MOSI line to
provide serial input data to a module or Slot 0.
26 SERDATOUT Serial Data Out—This signal taps into the SCXIbus MISO line to
accept serial output data from a module.
27 DAQD*/A Data Acquisition Board Data/Address Line—This signal taps into
the SCXIbus D*/A line to indicate to the module whether the
incoming serial stream is data or address information.
29 SLOT0SEL* Slot 0 Select—This signal taps into the SCXIbus INTR* line to
indicate whether the information on MOSI is being sent to a
module or Slot 0.
36 SCANCLK Scan Clock—This indicates to the SCXI-1121 that a sample has
been taken by the data acquisition board and causes the SCXI-1121
to change channels. See the Timing Requirements and
Communication Protocol section later in this chapter for more
detailed information on timing.
37 SERCLK Serial Clock—This signal taps into the SCXIbus SPICLK line to
clock the data on the MOSI and MISO lines. See the Timing
Requirements and Communication Protocol section later in this
chapter for more detailed information on timing.
43 RSVD Reserved.
All other pins are not connected.