Chapter 3 Theory of Operation
SCXI-1121 User Manual 3-6 www.natinst.com
chassis is being used), and then releasing INTR* high. At this point, SS* of
the desired slot is asserted low and the data acquisition board can
communicate with the module in that slot according to the SPI protocol.
Digital Interface
Figure 3 -3 shows a diagram of the SCXI-1121 and SCXIbus digital
interface circuitry.
Figure 3-3. Digital Interface Circuitry Block Diagram
The digital interface circuitry is divided into a data acquisition section
and an SCXIbus section. The SCXI-1121 connects to the SCXIbus via a
4×24 metral receptacle and to the data acquisition board via a 50-pin
ribbon-cable header. The digital interface circuitry buffers the digital
signals from the data acquisition board and from the SCXIbus and sends
signals back and forth between the data acquisition board and the SCXIbus.
Digital
Interface
SCXIbus
Buffered Serial
Data
Buffered Digital
Signal Controls
SERDATIN
DAQD*/A
SLOT0SEL*
SERCLK
SERDATOUT
Rear Signal Connector
MISO
SPICLK
INTR*
D*/A
MOSI
SS*