Philips Semiconductors TDA8752B
Triple high-speed Analog-to-Digital Converter 110 Msps
Product specification Rev. 03 — 21 July 2000 30 of 38
9397 750 07338 © Philips Electronics N.V. 2000. All rights reserved.
[1] PLL long-term time jitter is measured at the end of the video line, where it is at its maximum.
Table 18: Examples of PLL settings and performance
V
CCA
=V
DDD
=V
CCD
=V
CCO
=5V; T
amb
=25
°
C.
Video standards fref
(kHz) fclk
(MHz) N KO
(MHz/V) CZ
(nF) CP
(nF) IP
(µA) Z
(kΩ)Long-term time jitter[1]
RMS-value
(ps) peak-to-peak
value (ns)
CGA: 640 ×200 15.75 14.3 912 15 39 0.15 100 8 593 3.56
VGA: 640×480 31.5 25.18 800 20 39 0.15 200 4 255 1.53
VGA: 640×482 48.07 38.4 800 20 39 0.15 400 4 173 1.04
VESA: 800 ×600
(SVGA 72Hz) 48.08 50 1040 35 39 0.15 200 4 200 1.2
VESA: 1024×768
(XGA 75Hz) 60.02 78.75 1312 50 39 0.15 700 2 122 0.73
SUN: 1152 ×900 66.67 100 1500 50 39 0.15 400 4 115 0.69
VESA: 1280×1024
(SXGA 60 Hz) 63.98 108 1688 50 39 0.15 400 4 112 0.67