Main
Page
Page
Introduction
CP-series CP1E CPU Units
Intended Audience
Applicable Products
2
CP1E CPU Unit Manuals
This
Manual
Mounting and Setting Hardware
Wiring Connecting Online to the PLC Software Setup
Manual Configuration CP1E CPU Unit Instructions Reference Manual (Cat. No. W483) (This Manual)
CP1E CPU Unit Software Users Manual (Cat. No. W480)
4
CP1E CPU Unit Hardware Users Manual (Cat. No. W479)
Manual Structure
Page Structure and Icons
Special Information
5-2 Installation
6
Terminology and Notation
Sections in this Manual
8
CONTENTS
Section 1 Summary of Instructio ns ............................................ ..1-1
Section 2 Instructions ................................ .................................... 2-1
9
Page
Page
Read and Understand this Manual
Warranty and Limitations of Liability
WARRANTY
LIMITATIONS OF LIABILITY
Application Considerations
SUITABILITY FOR USE
PROGRAMMABLE PRODUCTS
Disclaimers
Safety Precautions
Definition of Precautionary Information
Symbols
WARNING Caution
CautionCaution
Caution
Precautions for Safe Use
Handling
External Circuits
Page
20
Related Manuals
The following manuals are related to the CP1E. Use them together with this manual.
Page
Page
1-2
1-1 Summary of Instructions
There are 200 types of instructions can be used by CP1E.
1-3
1-4
1-5
1-6
1-7
1-8
1-9
1-10
1-11
Page
Instructions
2-2
Notation and Layout of Instruction Descriptions
Constants
Examples
2-4
Condition Flags
Symbol Instructions
Sequence Input Instructions
Differentiated and Immediate Refreshing Instructions
2-6
Operation Timing for I/O Instructions
LD/LD NOT
LD
LD NOT
Page
AND/AND NOT
AND
AND NOT
Page
OR/OR NOT
OR
OR NOT
Page
AND LD/OR LD
Page
2-15
2-16
NOT
in the following example.
There are no flags affected by NOT(520).
Instruction Mnemonic Variations Function
NOT NOT --- 520 Reverses the execution condition.
UP/DOWN
UP
DOWN
Sequence Output Instructions
OUT/OUT NOT
OUT
OUT NOT
Page
TR
Using TR0 to TR15
2-21
Sequence Output Instructions
KEEP
KEEP
No flags are affected by KEEP(011).
Instruction Mnemonic Variations Function
KEEP KEEP !KEEP 011 Operates like a latching relay.
Page
NEVER
Page
DIFU
Page
DIFD
Page
2-29
SET/RSET
No flags are affected by SET and RSET.
SET
RSET
Page
2-31
Sequence Output Instructions
SETA/RSTA
SETA/RSTA
Instruction Mnemonic Variations Function
Page
2-33
Sequence Output Instructions
SETB/RSTB
SETB/RSTB
Instruction Mnemonic Variations Function
SETB
RSTB
2-35
Sequence Control Instructions
Overview of Interlock Instructions
Interlock Instructions
MULTI-INTERLOCK DIFFERENTIATION RELEASE and MULTI-INTERLOCK CLEAR (MILR(518) and MILC(519))*
Differences between Interlocks and Multiple Interlocks
Differences between MILH(517) and MILR(518)
Precautions
2-37
Differences between Interlocks and Jumps
END
NOP
2-40
IL/ILC
INTERLOCK IL --- 002
There are no flags affected by this instruction.
Instruction Mnemonic Variations Function
Page
Operation of Differentiated Instructions
Page
2-44
MILH/MILR/MILC
N: Interlock Number
D: Interlock Status Bit
Interlock Status
Nesting
2-46
Differences between MILH(517) and MILR(518)
Operation of Differentiated Instructions in an MILH(517) Interlock
Operation of Differentiated Instructions in an MILR(518) Interlock
Controlling Interlock Status from a Programming Device
2-49
Sequence Control Instructions
MILH/MILR/MILC
Page
2-51
Program with IL(002)/ILC(003) Interlocks
2-52
2-53
JMP/CJP/JME
N: Jump Number
The jump number must be 0000 to 007F (&0 to &127 decimal).
JMP/CJP JME
There are no flags affected by this instruction.
JMP
CJP
Page
FOR/NEXT
N: Number of loops
Page
2-58
BREAK
2-60
Timer and Counter Instructions
Refresh Methods for Timer/Counter PV
Basic Timer Specifications
Overview
Applicable Instructions
Operating Mode
2-62
Example Timer and Counter Applications
2-63
2-64
Timer reset method
2-66
TIM/TIMX
The timer number must be between 0000 and 0255 (decimal).
S: Set Value (100-ms Units)
TIM (BCD): #0000 to #9999. TIMX (Binary): &0 to &65535 (decimal) or #0000 to #FFFF (hex).
Instruction Mnemonic Variations Function
Page
Page
2-69
Timer and Counter Instructions
N: Timer number
SS: Set value
TIMH/TIMHX
The timer number must be between 0000 and 0255 (decimal).
TIMH (BCD): #0000 to #9999 TIMHX (Binary): &0 to &65535 (decimal) or #0000 to #FFFF (hex)
Instruction Mnemonic Variations Function
TIMH(015)
Page
Page
TMHH/TMHHX
Page
2-74
TTIM/TTIMX
The timer number must be between 0000 to 0255 (decimal).
TTIM (BCD): #0000 to #9999 TTIMX (Binary): &0 to &65535 (decimal) or #0000 to #FFFF (hex)
Instruction Mnemonic Variations Function
Page
Page
2-77
Timer and Counter Instructions
TIML/TIMLX
TIML/TIMLX
Instruction Mnemonic Variations Function
D1: Completion Flag D2: PV Word S: SV Word
Note S, S+1, D2 and D2+1 must be in the same
Page
2-79
Timer and Counter Instructions
TIML/TIMLX
2-80
CNT/CNTX
N: Counter Number
The counter number must be between 0000 and 0255 (decimal).
CNT (BCD): #0000 to #9999 CNTX (Binary): &0 to &65535 (decimal) or #0000 to #FFFF (hex)
Instruction Mnemonic Variations Function
Page
Page
2-83
Timer and Counter Instructions
CNTR/CNTRX
CNTR/CNTRX
N: Counter Number
The counter number must be between 0000 and 0255(decimal).
CNTR (BCD):#0000 to #9999 CNTRX (Binary): &0 to &65535 (decimal) or #0000 to #FFFF (hex)
Instruction Mnemonic Variations Function
Page
2-85
Timer and Counter Instructions
CNTR/CNTRX
2-86
CNR/CNRX
N1: First Number in Range
N1 must be a timer number between T000 and T255 or a counter number between C000 and C255.
N2: Last Number in Range
N2 must be a timer number between T000 and T255 or a counter number between C000 and C255.
2-87
The timer/counter that is reset is as follows.
2-88
Comparison Instructions
Mnemonic
=, <>, <, <=, >, >=
Instruction Mnemonic Variations Function
Input Comparison Instructions =, <>, <, <=, >, >= --- 300 to 328
Function
Options
Function Mnemonic Name Code
Page
2-91
=DT, <>DT, <DT, <=DT, >DT, >=DT
2-92
Masking Time Values
2-94
2-95
Comparison Instructions
COMPARE CMP !CMP 020
CMP/CMPL
CMP/CMPL
Instruction Mnemonic Variations Function
CMP(020)
CMPL(060)
2-96
The following table shows the status of the Arithmetic Flags after execution of CMP(020).
The following table shows the status of the Arithmetic Flags after execution of CMPL(060)
CMP
CMPL
S1 S2
Page
2-98
CPS/CPSL
SIGNED BINARY COMPARE CPS !CPS 114
Instruction Mnemonic Variations Function
CPS(114)
CPSL(115)
The following table shows the status of the Arithmetic Flags after execution of CPS(114).
* A status of --- indicates that the Flag may be ON or OFF.
The following table shows the status of the Arithmetic Flags after execution of CPSL(115)
* A status of --- indicates that the Flag may be ON or OFF.
CPS
Page
2-101
Comparison Instructions
TABLE COMPARE TCMP @TCMP 085
TCMP
TCMP
Instruction Mnemonic Variations Function
T: First word of table R: Result word
2-102
Function
2-103
Comparison Instructions
BLOCK COMPARE BCMP @BCMP 068
BCMP
BCMP
Instruction Mnemonic Variations Function
B: First word of block R: Result word
2-104
2-105
ZCP/ZCPL
ZCP
ZCPL
2-107
Comparison Instructions
ZCP/ZCPL
2-108
Data Movement Instructions
MOV/MOVL/MVN
Instruction Mnemonic Variations Function
MOV
MOVL
MVN
2-110
2-111
Data Movement Instructions
MOVB
MOVB
Instruction Mnemonic Variations Function
MOVE BIT MOVB @MOVB 082 Transfers the specified bit.
Page
2-113
Data Movement Instructions
MOVD
MOVD
S: Source Word D: Destination Word
Instruction Mnemonic Variations Function
2-114
The following diagram shows examples of data transfers for various values of C.
Example of transferring multiple digits
2-115
Data Movement Instructions
XFRB
XFRB
C: Control Word D: First destination Word
Note The source words and the destination words must be in the same data area respectively.
Instruction Mnemonic Variations Function
MULTIPLE BIT TRANSFER XFRB @XFRB 062 Transfers the specified number of consecutive bits.
Page
2-117
Data Movement Instructions
XFER
XFER
N: Number of Words
Instruction Mnemonic Variations Function
BLOCK TRANSFER XFER @XFER 070 Transfers the specified number of consecutive
Page
2-119
Data Movement Instructions
BSET
BSET
St: Starting Word
Specifies the first word in the destination range.
E: End Word
Specifies the last word in the destination range.
Page
2-121
XCHG
XCHG(073) exchanges the contents of E1 and E2.
Page
2-123
Data Movement Instructions
SINGLE WORD DISTRIBUTE DIST @DIST 080
DIST
DIST
Bs: Destination Base Address
Of: Offset
The offset can be any value from 0000 to FFFF (0 to 65,535 decimal).
Note Bs and Bs+Of must be in the same data area.
Page
2-125
Data Movement Instructions
DATA COLLECT COLL @COLL 081
COLL
COLL
Bs: Source Base Address Of: Offset
The offset can be any value from 0000 to FFFF (0 to 65,535 decimal).
Note Bs and Bs+Of must be in the same data area.
Instruction Mnemonic Variations Function
Page
2-127
Data Shift Instructions
SFT
Data Shift Instructions
SFT
Instruction Mnemonic Variations Function
SHIFT REGISTER SFT --- 010 Operates a shift register.
SFT(010) St E
Shift Register Exceeding 16 Bits
2-129
Data Shift Instructions
SFTR
SFTR
Note St and E must be in the same data area.
Instruction Mnemonic Variations Function
REVERSIBLE SHIFT REGIS- TER SFTR @SFTR 084 Creates a shift register that shifts data to either the
right or the left.
Controlling Data
2-131
Data Shift Instructions
WSFT
WSFT
Instruction Mnemonic Variations Function
WORD SHIFT WSFT @WSFT 016 Shifts data between St and E in word units.
Page
2-133
Data Shift Instructions
ASL
ASL
Instruction Mnemonic Variations Function
ARITHMETIC SHIFT LEFT ASL @ASL 025 Shifts the contents of Wd one bit to the left.
ASR
2-135
Data Shift Instructions
01514 1CY
Wd: Word
ROL
Instruction Mnemonic Variations Function
ROTATE LEFT ROL @ROL 027 Shifts all Wd bits one bit to the left including the Carry Flag (CY).
ROL(027) Wd
Page
2-137
Data Shift Instructions
CY
Wd: Word
ROR
Instruction Mnemonic Variations Function
ROTATE RIGHT ROR @ROR 028 Shifts all Wd bits one bit to the right including the Carry Flag (CY).
ROR(028)
01514 1
Page
SLD/SRD
SLD
SRD
SLD
SRD
2-141
Data Shift Instructions
NASL/NSLL
NASL/NSLL
Instruction Mnemonic Variations Function
NASL NSLL
NASL
NSLL
2-143
Data Shift Instructions
NASL/NSLL
2-144
NASR/NSRL
D: Shift word
CC: Control word
Instruction Mnemonic Variations Function
the specified number of bits.
NASR
NSRL
2-146
2-147
Increment/Decrement Instructions
++/+ +L
Operation of ++(590)/++L(591)
++
++L
2-149
Increment/Decrement
Operation of @++(590)/@++L(591)
2-150
--/--L
Operation of --(592)/--L(593)
--
--L
Operation of @--(592)/@--L(593)
2-153
++B/+ +BL
Operation of ++B(594)/++BL(595)
++B
++BL
2-155
Increment/Decrement
Operation of @++B(594)/@++BL(595)
--B/- -BL
--B
--BL
2-157
Increment/Decrement
Operation of --B(596)/--BL(597)
Operation of @--B(596)/@--BL(597)
2-158
Symbol Math Instructions
+/+L
2-159
Symbol Math Instructions
+/+L
+
+(400) adds the binary values in Au and Ad and outputs the result to R.
+L
+L(401) adds the binary values in Au and Au+1 and Ad and Ad+1 and outputs the result to R.
2-160
+C/+CL
Instruction Mnemonic Variations Function
SIGNED BINARY ADD WITH CARRY +C @+C 402 Adds 4-digit (single-word) hexadecimal data
DOUBLE SIGNED BINARY ADD WITH CARRY +CL @+CL 403 Adds 8-digit (double-word) hexadecimal data
+C(402)
+C
+C(402) adds the binary values in Au, Ad, and CY and outputs the result to R.
+CL
+CL(403) adds the binary values in Au and Au+1, Ad and Ad+1, and CY and outputs the result to R.
To clear the Carry Flag (CY), execute the Clear Carry (CLC(041)) instruction.
+B/+BL
Instruction Mnemonic Variations Function
BCD ADD WITHOUT CARRY +B @+B 404 Adds 4-digit (single-word) BCD data and/or con-
DOUBLE BCD ADD WITHOUT CARRY +BL @+BL 405 Adds 8-digit (double-word) BCD data and/or con-
2-163
+B
+B(404) adds the BCD values in Au and Ad and outputs the result to R.
+BL
+BL(405) adds the BCD values in Au and Au+1 and Ad and Ad+1 and outputs the result to R, R+1.
2-164
+BC/+BCL
Instruction Mnemonic Variations Function
stants with the Carry Flag (CY).
2-165
Symbol Math Instructions
+BC
+BC(406) adds BCD values in Au, Ad, and CY and outputs the result to R.
+BCL
+BCL(407) adds the BCD values in Au and Au+1, Ad and Ad+1, and CY and outputs the result to R, R+1.
To clear the Carry Flay (CY), execute the Clear Carry (CLC(041)) instruction.
/L
-L(410)
Instruction Mnemonic Variations Function
SIGNED BINARY SUBTRACT WITHOUT CARRY @ 410 Subtracts 4-digit (single-word) hexadecimal data
and/or constants. DOUBLE SIGNED BINARY SUBTRACT WITHOUT CARRY
Example 1
Example 2
2-169
Symbol Math Instructions
/L
Subtraction at (1)
Subtraction at (2)
C/CL
Instruction Mnemonic Variations Function
SIGNED BINARY SUBTRACT WITH CARRY C @C 412 Subtracts 4-digit (single-word) hexadecimal data
C(412) CL(413)
C
CL
2-172
B/BL
Instruction Mnemonic Variations Function
BCD SUBTRACT WITHOUT CARRY B @B 414 Subtracts 4-digit (single-word) BCD data and/or
DOUBLE BCD SUBTRACT WITHOUT CARRY BL @BL 415 Subtracts 8-digit (double-word) BCD data and/or
B
BL
2-174
Subtraction at (1)
Subtraction at (2)
Final Subtraction Result
2-175
BC/BCL
Instruction Mnemonic Variations Function
BCD SUBTRACT WITH CARRY BC @BC 416 Subtracts 4-digit (single-word) BCD data and/or
constants with the Carry Flag (CY).
BC
BCL
2-177
Symbol Math Instructions
*/*L
*/*L
Instruction Mnemonic Variations Function
SIGNED BINARY MULTIPLY * @* 420 Multiplies 4-digit signed hexadecimal data and/or
DOUBLE SIGNED BINARY MULTIPLY *L @*L 421 Multiplies 8-digit signed hexadecimal data and/or
2-178
*
*(420) multiplies the signed binary values in Md and Mr and outputs the result to R, R+1.
*L
2-179
Symbol Math Instructions
*B/*BL
Instruction Mnemonic Variations Function
BCD MULTIPLY *B @*B 424 Multiplies 4-digit (single-word) BCD data and/or
DOUBLE BCD MULTIPLY *BL @*BL 425 Multiplies 8-digit (double-word) BCD data and/or
2-180
*B
*B(424) multiplies the BCD content of Md and Mr and outputs the result to R, R+1.
*BL
2-181
/, /L
2-182
/
Note Division of hexadecimal #8000 by #FFFF is undefined.
/L
Note Division of hexadecimal #80000000 by #FFFFFFFF is undefined.
2-183
/B, /BL
Instruction Mnemonic Variations Function
BCD DIVIDE /B @/B 434 Divides 4-digit (single-word) BCD data and/or con-
DOUBLE BCD DIVIDE /BL @/BL 435 Divides 8-digit (double-word) BCD data and/or
2-184
/B
/BL
2-185
Conversion Instructions
BIN/BINL
Conversion Instructions
BIN/BINL
Instruction Mnemonic Variations Function
(32-bit binary) data.
2-186
BIN
BINL
2-187
Conversion Instructions
BCD/BCDL
BCD/BCDL
S: Source Word (BCD)/First Source Word (BCDL)
Instruction Mnemonic Variations Function
to 8-digit BCD data.
S: Source word D: Result word
BCD
BCDL
2-189
Conversion Instructions
(S) (R)
NEG
Instruction Mnemonic Variations Function
2S COMPLEMENT NEG @NEG 160 Calculates the 2s complement of a word of hexa- decimal data.
NEG
S: Source word
2-190
2-191
Conversion Instructions
Note The result words must be in the same data area.
DATA DECODER MLPX @MLPX 076
MLPX
4-to-16 bit decoder
Instruction Mnemonic Variations Function
S: Source Word R: First Result Word
2-192
8-to-256 bit conversion
S: Source Word R: First Result Word
Note The result words must be in the same data area.
4-to-16 bit Conversion
4-to-16 bit conversion
8-to-256 bit conversion
8-to-256 bit Conversion
2-194
4-to-16 bit Conversion
8-to-256 bit Conversion
C: #
Digits
Bits 0 to 3: Starting digit (Digit 1) Bits 4 to 7: Number of digits (3 digits)
Example of multi-digit decoding
Example of 4-to-16 bit decoding
2-196
DMPX
DATA ENCODER DMPX @DMPX 077
16-to-4 bit conversion
Instruction Mnemonic Variations Function
R: Result Word
256-to-8 bit conversion
16-to-4 bit Conversion
S+15 to S: 1st digit of digits to be encoded S+31 to S+16: 2nd digit of digits to be encoded
R: Result Word
Note The source words must be in the same
256-to-8 bit Conversion
16-to-4 bit conversion
256-to-8 bit conversion
2-199
Conversion Instructions
16-to-4 bit Conversion
Example of multi-digit decoding
256-to-8 bit Conversion
2-201
Conversion Instructions
ASC
ASC
DI: Digit Designator
Instruction Mnemonic Variations Function
S: Source Word D: First Destination Word
Note The destination words must be in the same
Page
2-203
Conversion Instructions
ASC
Example of ASCII code conversion
* Parity bit - changes according to the parity specification.
Parity
Examples of Di
2-205
Conversion Instructions
ASCII TO HEX HEX @HEX 162
HEX
DI: Digit Designator
Instruction Mnemonic Variations Function
S: First Source Word D: Destination Word
Page
Parity
2-208
Output example
* Parity bit - changes according to the par ity specification.
2-209
Example of converting multiple bytes of ASCII code to hex
2-210
Logic Instructions
ANDW/ANDL
Instruction Mnemonic Variations Function
2-211
Logic Instructions
ANDW
ANDW(034) takes the logical AND of data spec- ified in I1 and I2 and outputs the result to R.
ANDL
I1, I2 R
I1I2R
ORW/ORWL
Instruction Mnemonic Variations Function
2-213
Logic Instructions
ORW/ORWL
ORW
ORW(035) takes the logical OR of data speci- fied in I1 and I2 and outputs the result to R.
ORWL
I1, I2 R
I1I2R
XORW/XORL
Instruction Mnemonic Variations Function
Takes the logical exclusive OR of corresponding bits in double words of word data and/or con-
XORW
XORL
2-216
COM/COML
COM
COM(029) reverses the status of every specified bit in Wd. WdWd: 1 0 and 0 1
COML
COML(614) reverses the status of every specified bit in Wd and Wd+1. (Wd+1, Wd)(Wd+1, Wd)
2-217
Logic Instructions
COM/COML
When CIO 0.00 is ON in the following example, the status of each bit D100 will be reversed.
2-218
Special Math Instructions
APR
Sine Function Cosine Function
Linear Extrapolation Function
Unsigned Integer Data (Binary or BCD)
2-220
Signed Integer Data (Binary)
Single-precision Floating-point Data
2-221
Operation of the Linear Extrapolation Function
Yn+
Y
Up to 256 endpoints can be stored in the line-segment data table beginning at C+1.
Y X
16-bit Unsigned BCD Data
32-bit Signed Binary Data
16-bit Unsigned Binary Data
16-bit Signed Binary Data
2-223
Sine Function (C: #0000)
The following example shows APR(069) used to calculate the sine of 30. (SIN(30) = 0.5000)
Cosine Function (C: #0001)
The following example shows APR(069) used to calculate the cosine of 30. (COS(30) = 0.8660)
Floating-point Data
X
APR
Y
R R+1
S S+1
X
Y
X
Y
R R+1
S S+1
2-227
BCNT
N: Number of words The number of words must be 0001 to FFFF (1 to 65,535 words).
Instruction Mnemonic Variations Function
BIT COUNTER BCNT @BCNT 067 Counts the total number of ON bits in the specified word(s).
2-228
W1: Temporary storage W2: Temporary storage
Floating-point Math Instructions
Data Format
Number of Digits
Floating-point Data
Special Numbers
Writing Floating-point Data
Numbers Expressed as Floating-point Values
Floating-point Arithmetic Results
Floating-point Calculation Results
2-233
FIX/FIXL
FIX
FIXL
2-235
FLT/FLTL
FLT
FLTL
2-237
+F, F, *F, /F
2-238
+F
-F
Name Label Operation
2-239
Floating-point Math
*F
/F
Operation rules
FLOATING-POINT ADD (+F)
FLOATING-POINT SUBTRACT (F)
FLOATING-POINT MULTIPLY (*F)
FLOATING-POINT DIVIDE (/F)
2-241
=F, <>F, <F, <=F, >F, >=F
Options
2-243
Floating-point Math
SINGLE FLOATING LESS THAN Comparison (<F)
=F, <>F, <F, <=F, >F, >=F
334 LD>=F LOAD FLOATING GREATER THAN OR EQUAL True if S1+1, S1 S 2 +1, S
FSTR
C: First Control Word
Note There are limits on the total number of characters and the number of fractional digits.
Page
Storage of ASCII Text
Limits on the Number of ASCII Characters
Converting to ASCII Text in Decimal Notation
2-248
Converting to ASCII Text in Scientific Notation
2-249
FVAL
2-250
2-251
Floating-point Math
ASCII Character Storage
Scientific notation
Storage of ASCII Text
S
Decimal notation
2-252
Converting ASCII Text in Decimal Notation to Floating-point Data
Converting ASCII Text in Scientific Notation
2-253
Table Data Processing
SWAP
Table Data Processing Instructions
SWAP
N: Number of words
R1: First word in range
Note R1 and R1+(N-1) must be in the same data area.
2-254
R1
N
This instruction can be used to reverse the order of ASCII-code characters in each word.
Byte position is swapped.
FCS
Instruction Mnemonic Variations Function
C: First control word R1: First word in range D: First destination word
Note C and C+1, all of the words in the calculation range must be in the same data area.
C: First control word R1: First word in range D: First destination word
Page
2-257
Data Control Instructions
PIDAT
Data Control Instructions
PIDAT
C: First Parameter Word
Instruction Mnemonic Variations Function
PID CONTROL WITH AUTOTUNING PIDAT --- 191 Executes PID control according to the specified
Autotuning
PID Control
Performance Specifications
Calculation Method
2-261
Block Diagram for Target Value PID with Two Degrees of Freedom
PID Parameter Settings
2-262
Sampling Period and Cycle Time
PID control
Proportional Action (P)
Integral Action (I)
Derivative Action (D)
PID Action
Direction of Action
Adjusting PID Parameters
2-267
Interrupting PID Control to Perform Autotuning
PIDAT 10 D200 20
0.00
D W0.0 SETB D209 #000F
2-268
Starting PIDAT(191) with Autotuning
MV
Interrupting Autotuning Before Completion
PV SV
2-269
TPO
S: Input Word
C: First Parameter Word
Note For details, see the description of each parameter.
Instruction Mnemonic Variations Function
R: Pulse Output Bit
Combining TPO(685) with a PID Control Instruction
2-271
Transistor Output Unit
+
Parameter Settings
Execution
SSR
Heater 12 to 24 VDC
Page
2-273
Input time setting = 2 (Use higher value.)
Input time setting = 3 (Continuous adjustment)
2-274
Combining TPO(685) with PIDAT(191)
2-275
Using TPO(685) Alone
2-276
SCL
Instruction Mnemonic Variations Function
Note P1 to P1+3 must be in the same area.
Page
2-278
Reference:
Reverse Scaling
2-280
SCL2
SCALING 2 SCL2 @SCL2 486
Instruction Mnemonic Variations Function
Note P1 to P1+2 must be in the same area.
Page
Scaling 1 to 5-V Analog Input to 0 to 300
2-283
Data Control Instructions
SCL2
Scaling 1 to 5-V Analog Input to 200 to 200
2-284
SCL3
SCALING 3 SCL3 @SCL3 487
Instruction Mnemonic Variations Function
Note P1 to P1+4 must be in the same area.
Page
2-286
2-287
Data Control Instructions
AVG
AVG
N: Number of Cycles
The number of cycles must be between 0001 and 0040 hexadecimal (0 to 64 cycles).
R: Result First Word and R+1: First Work Area W or
Note R to R+N+1 must be in the same area.
Page
2-289
Data Control Instructions
AVG
2-290
Subroutines Instructions
N: Subroutine number
SBS
N: Subroutine number
Specifies the subroutine number between 0 and 127 decimal.
Page
Page
2-293
Subroutines Instructions
SBS
Sequential (Non-nested) Subroutines
2-294
Nested Subroutines
2-295
SBN/RET
RET
N: Subroutine number
Specifies the subroutine number between 0 and 127 decimal.
Combined-use instructions
SBN/RET
RET
Page
Interrupt Control Instructions
Outline of Interrupt Control Instructions
SET INTERRUPT MASK: MSKS(690)
CLEAR INTERRUPT: CLI(691)
DISABLE INTERRUPTS: DI(693)
Related Memory Area Words
2-300
MSKS
(2) Resetting and Starting Scheduled Interrupts
(1) I/O Interrupt Task
Instruction Mnemonic Variations Function
N: Interrupt identifier
Page
Examples for Input Interrupts
Example for Scheduled Interrupts
2-303
Interrupt Control Instructions
CLEAR INTERRUPT CLI @CLI 691
CLI
(1) Clearing/Retaining an I/O Interrupt Tasks Recorded Interrupt Inputs
Instruction Mnemonic Variations Function
N: Interrupt number
CLI(691)
Page
Example for Input Interrupts
Example for First Scheduled Interrupts
Example for High-speed Counter Interrupts
DI
EI
2-308
High-speed Counter/Pulse Output Instructions
NV: First word with new PV
INI
INI(880)
C NV
NV: First Word with New PV
Starting Comparison (C = 0000 hex)
Stopping Comparison (C = 0001 hex)
NV NV+1
0 15 For Pulse Output or High-speed Counter Input: 0000 0000 to FFFF FFFF hex
Changing a PV (C = 0002 hex)
Stopping Pulse Output (P = 0000, 0001 or 1000 hex and C = 0003 hex)
2-311
High-speed Counter/Pulse
D
PRV
Instruction Mnemonic Variations Function
and interrupt input PV in counter mode.
PRV(881) P
P: Port specifier
D: First Destination Word
2-313
High-speed Counter/Pulse
PRV
Reading a PV (C = 0000 hex)
Reading Status (C = 0001 hex)
Reading the Results of Range Comparison (C = 0002 hex)
Reading Pulse Output or High-speed Counter Frequency (C = 00@3 hex)
Pulse Frequency Calculation Methods
2-315
CTBL
C: Control data
P: Port specifier
CTBL(882)
C TB TB: First comparison table word
TB: First comparison table word
Note Always set the upper limit greater than or equal to the lower limit for any one range.
Registering a Comparison Table (C = 0002 or 0003 hex)
Registering a Comparison Table and Starting Comparison (C = 0000 or 0001 hex)
Stopping Comparison
Target Value Comparison
Range Comparison
2-319
High-speed Counter/Pulse
F: First pulse frequency word
SPED
SPED
Instruction Mnemonic Variations Function
M: Output mode F: First pulse frequency word
SPED(855)
M F
Continuous Mode Speed Control
2-321
High-speed Counter/Pulse
SPED
2-322
2-323
High-speed Counter/Pulse
0
N+1
PULS
T: Pulse type N and N+1: Number of pulses
Instruction Mnemonic Variations Function
PPort
TPulse type
2-324
2-325
PLS2
M: Output Mode
PLS2(887)
M S F
2-326
S: First Word of Settings Table
F: First Word of Starting Frequency
The starting frequency is given in F and F+1.
Page
2-328
Note Pulse output will stop immediately if the CPU Unit is changed to PROGRAM mode.
2-329
High-speed Counter/Pulse
PLS2
2-330
Switching from Continuous Mode Speed Control to Independent Mode Positioning
2-331
High-speed Counter/Pulse
ACCELERATION CONTROL ACC @ACC 888
ACC
ACC
M: Output Mode
S: First Word of Settings Table
Note Use the same pulse output method when using both pulse outputs 0 and 1.
Instruction Mnemonic Variations Function
Page
2-333
Continuous Mode Speed Control
Pulse output will continue until it is stopped from the program.
Note Pulse output will stop immediately if the CPU Unit is changed to PROGRAM mode.
2-334
2-335
2-336
ORG
Instruction Mnemonic Variations Function
ORIGIN SEARCH ORG @ORG 889 ORG(889) performs an origin search or origin return operation.
Origin Search (Bits 12 to 15 of C = 0 hex)
Origin Return (Bits 12 to 15 of C = 1 hex)
2-339
PWM
F: Frequency
D: Duty Factor
P: Port specifier F: Frequency D: Duty factor
PWM
Page
2-341
Step Instructions
In CP1E series PLCs, STEP(008)/SNXT(009) can be used together to create step programs.
Note Work bits are used as the control bits for A, B, C and D.
SNXT/STEP
SNXT(009)
Starting Step Execution
Proceeding to the Next Step
Ending the Step Programming Area
STEP(008)
Starting a Step
Interlock Status (IL)
Related Bits
2-345
Step Instructions
SNXT/STEP
2-346
(1) Sequential Control
2-347
Step Instructions
Step (C) ladder program
Additional Information:
Step (A) ladder program
Step (B) ladder program
Step W0.00 (A)
Step W0.01 (B)
2-348
(3) Parallel Control
Step (E) ladder program
Step (A) ladder program Step W0.00 (A)
Step W0.01 (B)
Application Examples
(1) Sequential Execution
2-350
(2) Branching Execution
2-351
(3) Parallel Execution
2-352
Basic I/O Unit Instructions
IORF
St: Starting Word
CIO 001 to CIO 099, CIO 101 to CIO 199 (CP1W Expansion I/O Units I/O Area)
E: End Word
Units Refreshed by IORF(097)
Refreshing Words in the I/O Bit Area
2-354
SDEC
7-SEGMENT DECODER SDEC @SDEC 078
Di: Digit designator
Instruction Mnemonic Variations Function
S: Source word Di: Digit designator D: First destination word
Page
2-356
7-segment Data
2-357
Basic I/O Unit Instructions
DIGITAL SWITCH INPUT DSW --- 210
DSW
DSW
I: Input Word (Data Line D0 to D3 Inputs)
O: Output Word (CS/RD Control Signal Outputs)
Instruction Mnemonic Variations Function
D: First Result Word
C1: Number of Digits
C2: System Word
2-359
Basic I/O Unit Instructions
DSW
Page
2-361
Basic I/O Unit Instructions
MATRIX INPUT MTR --- 213
MTR
MTR
I: Input Word
O: Output Word (Selection Signal Outputs)
Instruction Mnemonic Variations Function
2-362
D: First Register Word
Specifies the leading word address of the 4 words that contain the data from the 8 8 matrix.
C: System Word
Specifies a work word used by the instruction. This word cannot be used in any other application.
2-363
Basic I/O Unit Instructions
MTR
Page
2-365
Basic I/O Unit Instructions
7SEG
7SEG
S: Source Word
Specify the first source word containing the data that will be converted to 7-segment display data.
O: Output Word (Data and Latch Outputs)
Instruction Mnemonic Variations Function
D: System Word
2-367
Basic I/O Unit Instructions
7SEG
Note 0 to 3: Data output for word S 4 to 7: Data output for word S+1
Page
2-369
Serial Communication Instructions
TXD
CPU Units Built-in RS-232C Port Serial Option Board Port
2-371
Serial Communication
TXD
Start code / end code settings and send data
Sending Data to a Code Reader
Hardware Configuration
Communications Settings
2-373
Serial Communication
Programming Example
Controlling Signals
2-374
RXD
RECEIVE RXD @RXD 235
Instruction Mnemonic Variations Function
2-375
Auxiliary Area Flags for CPU Units RS-232C Port
Auxiliary Area Flags for Serial Option Board Port
Page
2-377
Start Code/End Code Settings and Receive Data
Receiving data
Hardware Configuration
Communications Settings
2-379
Programming Example
Controlling Signals
2-380
Clock Instructions
CADD/CSUB
2-381
Clock Instructions
CADD/CSUB
C through C+2: Calendar Data T and T+1: Time Data
R through R+2: Result Data
2-382
C through C+2: Calendar Data T and T+1: Time Data
R through R+2: Result Data
2-383
Clock Instructions
CADD/CSUB
2-384
2-385
Clock Instructions
DATE
DATE
S through S+3: New Clock Setting
Note S through S+3 must be in the same data area.
Instruction Mnemonic Variations Function
Page
2-387
Failure Diagnosis Instructions
FAL
Failure Diagnosis Instructions
FAL
Generating or Clearing User-defined Non-fatal Errors
Instruction Mnemonic Variations Function
2-388
Clearing Non-fatal Errors without a Programming Device
Clearing User-defined Non-fatal Errors
Clearing Non-fatal System Errors
Generating Non-fatal User-defined Errors
Disabling Error Log Entries of User-defined Errors
Displaying Messages with Non-fatal User-defined Errors
Generating a Non-fatal Error
Clearing a Particular Non-fatal Error
Clearing All Non-fatal Errors
Clearing the Most Serious Non-fatal Error
Generating a Non-fatal System Error
2-393
FAL S
Generating User-defined Fatal Errors
Generating Fatal Errors from the System
The following table shows the function of the operands.
Instruction Mnemonic Variations Function
Generating Fatal User-defined Errors
2-395
Displaying Messages with Fatal User-defined Errors
Clearing FALS(007) Fatal System Errors
Clearing FALS(007) User-defined Fatal Errors
Generating a User-defined Error
Generating a Non-fatal System Error
Other Instructions
STC/CLC
STC
CLC
2-399
WDT
T: Timer setting
CX-Programmer settings
PLC Setup settings
Operation of WDT(094)
Page
3-1 CP1E CPU Unit Instruction Execution Times and Number of Steps
3-3
Sequence Input Instructions
Sequence Output Instructions
3-4
Sequence Control Instructions
Timer and Counter Instructions
3-5
Comparison Instructions
3-6
Data Movement Instructions
Data Shift Instructions
3-7
Increment/Decrement Instructions
Symbol Math Instructions
3-8
Conversion Instructions
Logic Instructions
Special Math Instructions
3-9
Floating-point Math Instructions
Table Data Processing Instructions
Data Control Instructions
3-10
Subroutine Instructions
Interrupt Control Instructions
High-speed Counter and Pulse Output Instructions
3-11
Step Instructions
I/O Unit Instructions
Serial Communications Instructions
Clock Instructions
3-12
Failure Diagnosis Instructions
Other Instructions
Monitoring and Computing the Cycle Time
4-1 Monitoring the Cycle Time
4-1-1 Monitoring the Cycle Time Monitoring the Average Value Monitoring Maximum and Minimum Values
4-3
4-2 Computing the Cycle Time
4-2-1 CPU Unit Operation Flowchart
4-2 Computing the Cycle Time
4-2-1 CPU Unit Operation Flowchart
4-2-2 Cycle Time Overview
4-5
(5) Peripheral Servicing
I/O Refresh Times for Built-in Analog I/O (NA-type CPU Unit only)
Note No matter whether use analog I/O function or not, the I/O refresh time is the same.
4-2-3 I/O Refresh Times for PLC Units
Conditions
Calculation Example
4-2-4 Cycle Time Calculation Example
4-2-5 Increase in Cycle Time for Online Editing
Page
A-2
Alphabetical List of Instructions by Mnemonic
A
B
C
A-3
A-4
D
E
F
H I
J K L
A-5
A-6
M
N
O
A-7
P
R
A-8
S
T
U
X
W
Z
Symbol
RANGE COM- PARE
A-10
ASCII Code Table
Four rightmost bits
Page
Page
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