Chapter 4 Timer Functions

[5-2-3 "Serial Interface

Transfer Timing"]

Setting the Added Pulse Position

The upper 8 bits of compare register 4 (TM4OCH) set the position of the added pulse. If the TM4OCH register is set to X'00', an additional bit is not appended to the basic PWM component. If the TM4OCH register is set to X'FF', an additional bit is repeatedly appended to the 255 basic PWM components during the period. The relation between the value set in the TM4OCH register and the added pulse is shown in the table below. If X'03' is set in the TM4OCH register, bits are appended to pulse positions for X'01' and X'02', shown in table 4-3-1. The relation between the value set in the TM4OCH register and the position of the added bit is shown in figure 4-3-5.

Table 4-3-1 Pulse-Added PWM OutputFigure

 

Value Set in TM4OCH Register

Added Pulse Position (value of Tn)

 

0 0 0 0 0 0 0 0

 

 

 

 

0 0 0 0 0 0 0 1

X'80'

 

 

 

0 0 0 0 0 0 1 0

X'40',X'C0'

 

 

 

0 0 0 0 0 1 0 0

X'20',X'60',X'A0',X'E0'

 

 

0 0 0 0 1 0 0 0

X'10',X'30',X'50',X'70',X'90',X'B0',X'D0',

 

0 0 0 1 0 0 0 0

X'08',X'18',X'28',X'38',X'48',X'58' . . . . .,X'

 

0 0 1 0 0 0 0 0

X'04',X'0C',X'14',X'1C',X'24',X'2C' . . . . .,X

 

0 1 0 0 0 0 0 0

X'02',X'06',X'0A',X'0E',X'12',X'16' . . . . .,X

 

1 0 0 0 0 0 0 0

X'01',X'03',X'05',X'07',X'09',X'0B' . . . . .,X'

 

(MSB)

(LSB)

 

 

 

TM4OCH

 

Repeated 256 times

 

 

0

X '40'

X '80'

X 'C0'

X 'FF'Position of

Register setting

value

 

 

 

 

added pulse

X '00'

 

 

 

 

 

X '01'

 

 

 

 

 

X '02'

 

 

 

 

 

X '04'

 

 

 

 

 

X '08'

 

 

 

 

 

X '10'

 

 

 

 

 

PWM basic component

Position of added pulse X'87'

Position of added pulse X'88'

Figure 4-3-5 Pulse Added Type PWM Output

74 16-bit Timer Operation (timer 4)

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Panasonic MN101C00 Setting the Added Pulse Position, Pulse-Added PWM OutputFigure, Repeated 256 times FFPosition