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Patton electronic 3040/V35 manual DTR / DSR Forced Active JP8 thru JP12

Models: 3040/V35

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PATTON ELECTRONICS CO.

3040/V35

INSTALLATION AND OPERATIONS MANUAL

139001UA

DTR / DSR Forced Active (JP8 thru JP12)

DTR is tied to DSR on each of the Sub-Channel ports. If the device connected does not supply a DTR but requires DSR (DTE) or does not supply DSR but requires DTR (DCE), installing the forced DTR/DSR jumper (JP8-JP12) for the appropriate Sub-Channel will solve this problem. The line is forced to +8V via an 820W resistor, providing isolation to any driver that might be on the interface.

Channel	Jumper	Channel	Jumper
Master	JP8	3	JP11

1	JP9	4	JP12

2	JP10

FACTORY Test Jumpers (JP1, JP2 and JP3)

The three test jumpers JP1, 2 and 3, must be installed for the unit to properly function. These jumpers are used in the manufacture and test of the product prior to shipment.

SETUP & INSTALLATION

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Patton electronic 3040/V35 manual DTR / DSR Forced Active JP8 thru JP12, FACTORY Test Jumpers JP1, JP2 and JP3

Contents

3040/V35 CTS MD-V.35/TCBCopyright 2000 Patton Electronics Co., All Rights Reserved An ISO-9001SERVICE COPYRIGHT NOTICEPROPRIETARY NOTICE PUBLICATION NOTICERADIO AND TV INTERFERENCE EMISSION REQUIREMENTSCANADIAN EMISSIONS Contents CHAPTER 2 - SETUP AND INSTALLATIONCHAPTER 1 - OPERATION APPENDIXCHAPTER 1 - OPERATION 3040/V35Channel Clocking Fallback ClockingAnti-streaming Channel Selection ModesChannel Tail Circuits Channel Enable / Disable Switches Power SupplyInterface Connections Front Panel LEDsCHAPTER 2 - SETUP AND INSTALLATION Power ConnectionFactory Configuration Switch Settings Switch 16 - All to ONJP4 Thru JP7 Open JP1 Thru JP3 to InstalledJP8 thru JP12 to Open Equipment Grounding SW15-1 RTS To CTS Delay SW16-1,2,3Anti-Streaming SW18-1,2,3 Receive Data Mode SW18-7 Control Turn-Off Delay in “DATA” Switching Mode SW15-3,4Switch on Data / Control SW17-5,6,7,8 Internal Baud Rates SW15-5,6,7,8Fallback Mode Selection SW16-6 Fallback Clock Enable SW16-7Fallback Clocking From Sub-Channel 4 SW16-8 NOTE Both TX and RX Clock Source Select MUST Be Set TX Clock Source Selection SW17-1,2,3TX Clock Pin Selection SW17-4 RX Clock Source Selection SW18-4,5,6DCE DCE J8 thru JP12 Forced DSR/DTRDTR / DSR Forced Active JP8 thru JP12 FACTORY Test Jumpers JP1, JP2 and JP3Typical Tail Circuit Configuration APPENDIXV.35 V.35DB-25 Interface Pins Supported M-34 Interface Pins SupportedDB-25 Channel Port is a DTE Channel Port is a DCEMaster Port is a DTE Switch ControlMaster Port is a DCE Master Port is a DCEChannel Port is a DCE Channel Port is a DTETECHNICAL SPECIFICATIONS V.35 on DB-25 JP12Jumpers TestSales 301 975-1000 Support 301 7622 Rickenbacker Drive Gaithersburg, MD