INTERRUPT CONTROLLER S3C2440A RISC MICROPROCESSOR
14-12
INTMSK Bit Description Initial State
INT_ADC [31] 0 = Service available, 1 = Masked 1
INT_RTC [30] 0 = Service available, 1 = Mas ked 1
INT_SPI1 [29] 0 = Service available, 1 = Masked 1
INT_UART0 [28] 0 = Service available, 1 = Masked 1
INT_IIC [27] 0 = Service available, 1 = Masked 1
INT_USBH [26] 0 = Service available, 1 = Masked 1
INT_USBD [25] 0 = Service available, 1 = Masked 1
INT_NFCON [24] 0 = Service available, 1 = Masked 1
INT_UART1 [23] 0 = Service available, 1 = Masked 1
INT_SPI0 [22] 0 = Service available, 1 = Masked 1
INT_SDI [21] 0 = Service available, 1 = Mask ed 1
INT_DMA3 [20] 0 = Service available, 1 = Masked 1
INT_DMA2 [19] 0 = Service available, 1 = Masked 1
INT_DMA1 [18] 0 = Service available, 1 = Masked 1
INT_DMA0 [17] 0 = Service available, 1 = Masked 1
INT_LCD [16] 0 = Service available, 1 = Masked 1
INT_UART2 [15] 0 = Service available, 1 = Masked 1
INT_TIMER4 [14] 0 = Service available, 1 = Masked 1
INT_TIMER3 [13] 0 = Service available, 1 = Masked 1
INT_TIMER2 [12] 0 = Service available, 1 = Masked 1
INT_TIMER1 [11] 0 = Service available, 1 = Masked 1
INT_TIMER0 [10] 0 = Service available, 1 = Masked 1
INT_WDT_AC97 [9] 0 = Service available, 1 = Mask ed 1
INT_TICK [8] 0 = Service available, 1 = Mask ed 1
nBATT_FLT [7] 0 = Service available, 1 = Mas ked 1
INT_CAM [6] 0 = Ser vice available, 1 = Masked 1
EINT8_23 [5] 0 = Service available, 1 = Masked 1
EINT4_7 [4] 0 = Service available, 1 = Masked 1
EINT3 [3] 0 = Service available, 1 = Masked 1
EINT2 [2] 0 = Service available, 1 = Masked 1
EINT1 [1] 0 = Service available, 1 = Masked 1
EINT0 [0] 0 = Service available, 1 = Masked 1