LC-52LE920UN/LC-60LE920UN
CHAPTER 7. MAJOR IC INFORMATIONS[1] MAJOR IC INFORMATIONS
1. MAJOR IC INFORMATIONS
1.1. IC1504 (VHiSii9287+-1Q)
This IC is 4 input and 1 output HDMI port processor.
Itintegrated TMDS receiver and transmitter cores capable of receiving and transmitting at 2.25Gbps. (Supports video resolutions upto 1080p, 60Hz,
12bit.)
The Equalizer circuits to adapt long cable are integrated in This IC.
EDID and DDCsupport for 4 HDMI/DVI ports and 1VGA port.(This IC includes 256-byte NVRAM and 256-byte SRAM for each port(5total).)
1.2. IC2002 (RH-iXC786WJQZQ)
The monitor microprocessor is intended to communicate with the main microprocessor and to operate the system.
Italso controls power of the entire system.
1.3. IC2702, IC2703 (VHiYDA164QZ-1Y)
The Class-D type digital audio power amplifier YDA164QZ gives maximum continuous output of 10 W/chor woofer output 15W.
1.4. IC3302 (RH-iXC951WJNIQ)
This LSI is FULL HIGH-DEFINITION 1080P DIGITAL TV SYSTEM-ON-A-CHIE
Itcombines a cable/terrestrial 64/256-QAM and 8-VSB receiver, a transport processor, a digital audio processor, a high definition (HD) MPEG video
decoder, 2D graphics processing, digital processing of analog video and audio, analog video digitizer and DAC functions, stereo high-fidelity audio
DACs, HDMI receivers for 1080p 60 inputs, a 625-MHz processor, and a peripheral control unit providing avariety of television control functions.
The cable/terrestrial receiver directly samples atuner output with an analog-to-digital converter (ADC).
The LSI digitally resample and demodulates the signal with recovered clock and carrier timing, filters and equalizes the data, and passes soft deci-
sions to an ATSC/A74 and ITU-T J.83 Annex B-compatible decoder.
It hasan MPEG-2 Digital Video Broadcasting (DVB)-compliant transport processor with advanced section filtering capability, DVB descrambler, and
an MPEG-2 (MP@HL profile) video decoder.
Audio support includes a BTSC and a Dolby AC3/MPEG-2 Layer 1, 2, audio decoder.
The LSI provides analog and digital audio/video outputs.
A SPDIF output and a pair of analog outputs (L-R) are provided via the integrated audio DACs.
The NTSC analog video decoder is supported by itsown motion adaptive deinterlacing and 3D comb filtering, including 1080i deinterlacing.
The LSI includes advanced 2D graphics processing.
One transport stream input is included.
The LSI incorporates a complete ARM11-based microprocessor subsystem including caches with bridging to memory and alocal bus, where external
peripherals can be attached.
Integrated peripherals include two USB 2.0, three UARTs, counter/timers and GPIO controllers.
In this time, H264 decode/VC-I decode/secure boot function are added to this IC.
1.5. IC3501/IC3502 (RH-iXC754WJQZQ)
These are 1G bit (64M x 16bit) DDR2-1066 synchronous DRAM.
1.6. IC8401 (RH-iXD047WJQZQ)
The 512M-bit NAND flash memory device stores the main CPU program.
1.7. IC8455 (VHiR24064AS-1Y)
This is 64k-bit EEPROM device including the user setting.
1.8. IC506 (VHiM3221EiP-1Y)
This IC is a high speed, single-channel RS-232 transceiver interface device that operates from a single 3.3V power supply.
The device provides the electrical interface between an asynchronous communication controller and the serial-port connector.
This device operate at data signaling rates up to 460kbit/s.
All RS-232(Tout and Rin) and CMOS (Tin and Rout) inputs and outputs are protected against electrostatic discharge (up to +/- 15kV ESD protection).
1.9. IC9501 (VHi KSZS041T-1Y)
This IC is a single supply 10Base-T/100Base-TX Physical Layer Transceiver, which provides MII/RMII/SMII interfaces to transmit and receive data.