Description of the Control Commands

Si4421

Description of the Control Commands

 

 

 

 

 

 

 

 

 

 

1.

Configuration Setting Command

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

 

15

14

13

12

11

10

 

9

8

7

6

5

4

3

2

1

0

POR

 

 

 

1

0

0

0

0

0

 

0

0

el

ef

b1

b0

x3

x2

x1

x0

8008h

Bit el enables the internal data register.

Bit ef enables the FIFO mode. If ef = 0 then DATA (pin 6) and DCLK (pin 7) are used for data and data clock output.

b1

b0

Frequency Band

0

0

Reserved

0

1

433

1

0

868

1

1

915

2. Power Management Command

x3

0

0

0

0

1

1

x2

 

x1

x0

Crystal Load Capacitance [pF]

0

 

0

0

8.5

0

 

0

1

9.0

0

 

1

0

9.5

0

 

1

1

10.0

 

 

 

 

1

 

 

 

 

1

0

15.5

1

 

1

1

16.0

 

Bit

 

15

 

14

13

12

11

 

10

9

8

7

 

6

5

 

4

3

 

2

1

0

POR

 

 

 

 

1

 

 

0

0

0

0

 

0

1

0

er

 

ebb

et

 

es

ex

 

eb

ew

dc

8208h

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

 

 

Function of the control bit

 

 

 

 

 

 

 

Related blocks

 

 

 

 

 

 

er

 

 

Enables the whole receiver chain

 

 

 

 

 

 

RF front end, baseband, synthesizer, crystal oscillator

 

 

ebb

 

 

The receiver baseband circuit can be separately switched on

 

Baseband

 

 

 

 

 

 

et

 

 

Switches on the PLL, the power amplifier, and starts the

 

 

Power amplifier, synthesizer, crystal oscillator

 

 

 

 

transmission (If TX register is enabled)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

es

 

 

Turns on the synthesizer

 

 

 

 

 

 

 

Synthesizer

 

 

 

 

 

 

ex

 

 

Turns on the crystal oscillator

 

 

 

 

 

 

 

Crystal oscillator

 

 

 

 

 

eb

 

 

Enables the low battery detector

 

 

 

 

 

 

Low battery detector

 

 

 

 

 

ew

 

 

Enables the wake-up timer

 

 

 

 

 

 

 

Wake-up timer

 

 

 

 

 

 

dc

 

 

Disables the clock output (pin 8)

 

 

 

 

 

 

Clock output buffer

 

 

 

 

The ebb, es, and ex bits are provided to optimize the TX to RX or RX to TX turnaround time.

The RF frontend consist of the LNA (low noise amplifier) and the mixer. The synthesizer block has two main components: the VCO and the PLL. The baseband section contains the baseband amplifier, low pass filter, limiter and the I/Q demodulator.

To decrease TX/RX turnaround time, it is possible to leave the baseband section powered on. Switching to RX mode means disabling the PA and enabling the RF frontend. Since the baseband block is already on, the internal startup calibration will not be performed, the turnaround time will be shorter.

The synthesizer also has an internal startup calibration procedure. If quick RX/TX switching needed it may worth to leave this block on. Enabling the transmitter using the et bit will turn on the PA, the synthesizer is already up and running. The power amplifier almost immediately produces TX signal at the output.

The crystal oscillator provides reference signal to the RF synthesizer, the baseband circuits and the digital signal processor part. When the receiver or the transmitter part frequently used, it is advised to leave the oscillator running because the crystal might need a few milliseconds to start. This time mainly depends on the crystal parameters.

It is important to note that leaving blocks unnecessary turned on can increase the current consumption thus decreasing the battery life.

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Silicon Laboratories SI4421 manual Si4421, Description of the Control Commands, Configuration Setting Command