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Silicon Laboratories SI4421 manual Si4421, PIN6 Logic Diagram FSK / DATA / nFFS

Models: SI4421

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PIN6 Logic Diagram (FSK / DATA / nFFS)

Si4421

PIN6 Logic Diagram (FSK / DATA / nFFS)

PIN10 Logic Diagram (nRES I/O)

*Note: These pins can be left floating.

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Silicon Laboratories SI4421 manual Si4421, PIN6 Logic Diagram FSK / DATA / nFFS, PIN10 Logic Diagram nRES I/O

Contents

DESCRIPTION FUNCTIONAL BLOCK DIAGRAMFEATURES TYPICAL APPLICATIONSData Filtering and Clock Recovery DETAILED FEATURE-LEVELDESCRIPTIONRF Power Amplifier PA Si4421Data Validity Blocks Low Battery Voltage DetectorWake-UpTimer Crystal OscillatorType Si4421 PACKAGE PIN DEFINITIONSName FunctionName Si4421Internal Pin Connections Internal connectionNote These pins can be left floating PIN6 Logic Diagram FSK / DATA / nFFSPIN10 Logic Diagram nRES I/O Si4421Recommended supply decoupling capacitor values Si4421Typical Application Pin Function vs. Operation ModeSi4421 GENERAL DEVICE SPECIFICATIONS Absolute Maximum Ratings non-operatingRecommended Operating Range ELECTRICAL SPECIFICATION DC CharacteristicsSi4421 AC Characteristics PLL parameters AC Characteristics ReceiverSi4421 AC Characteristics Turn-on/Turnaroundtimings Si4421AC Characteristics Transmitter AC Characteristics OthersSi4421 Note 10 By designSi4421 CONTROL INTERFACE Timing SpecificationTiming Diagram Control Commands Control Register Default ValuesSi4421 2. Power Management Command Description of the Control CommandsConfiguration Setting Command Si4421Logic connections between power control bits Si44215. Receiver Control Command Frequency Setting Command4. Data Rate Command Si4421VDI Logic Diagram Si44216. Data Filter Command Si44217.FIFO and Reset Mode Command Si442110. AFC Command 8. Synchron Pattern Command9. Receiver FIFO Read Command Si4421Si4421 Bit 5-4rl1 to rl011. TX Configuration Control Command Frequency Setting CommandSi4421 13. Transmitter Register Write Command 12. PLL Setting CommandSi4421 14. Wake-UpTimer Command 15.Low Duty-CycleCommandSi4421 Vlb= 2.25 + V · 0.1 V Clock divider configuration Si442117. Status Read Command Si4421Bit Name Si4421 INTERRUPT HANDLING TX REGISTER BUFFERED DATA TRANSMISSION Si4421Si4421 Typical TX register usageSi4421 RX FIFO BUFFERED DATA READ RECOMMENDED PACKET STRUCTURESBit Rate 9.6 kbps Si4421 CRYSTAL SELECTION GUIDELINESBit Rate 2.4 kbps Bit Rate 38.4 kbpsSi4421 RX-TXALIGNMENT PROCEDURES Si4421 RESET MODES SW Reset Command Sensitive Reset Enabled, Ripple on VddFIFO and Reset Mode Command page Si4421Si4421 TYPICAL PERFORMANCE CHARACTERISTICS Channel Selectivity and BlockingSi4421 BER Curves in 433 MHz BandBER Curves in 868 MHz Band Si4421 434 MHzEvaluation Board with 50 Ohm Matching Network Si4421 REFERENCE DESIGNSSchematics Frequency Dependent Component ValuesSi4421 PCB Layout Top View Bottom ViewEvaluation Board with Resonant PCB Antenna BIFA SchematicsSi4421 Frequency Dependent Component ValuesSi4421 PCB Layout Antenna designed for 868/915 MHz bandTop View Bottom View Si4421 PACKAGE INFORMATION 16-pinTSSOPSee Detail “A” Section B-B Demo Boards and Development Kits RELATED PRODUCTS AND DOCUMENTSSi4421 Universal ISM Band FSK Transceiver Related ResourcesSi4421