Data Validity Blocks, Wake-UpTimer | Silicon Laboratories SI4421

Image 3

Silicon Laboratories SI4421 Data Validity Blocks, Crystal Oscillator, Low Battery Voltage Detector, Wake-UpTimer, Si4421

Contents

TYPICAL APPLICATIONS FUNCTIONAL BLOCK DIAGRAMFEATURES DESCRIPTION Si4421 DETAILED FEATURE-LEVELDESCRIPTIONRF Power Amplifier PA Data Filtering and Clock Recovery Crystal Oscillator Low Battery Voltage DetectorWake-UpTimer Data Validity Blocks Function Si4421 PACKAGE PIN DEFINITIONSName Type Internal connection Si4421Internal Pin Connections Name Si4421 PIN6 Logic Diagram FSK / DATA / nFFSPIN10 Logic Diagram nRES I/O Note These pins can be left floating Pin Function vs. Operation Mode Si4421Typical Application Recommended supply decoupling capacitor values Si4421 GENERAL DEVICE SPECIFICATIONS Absolute Maximum Ratings non-operatingRecommended Operating Range ELECTRICAL SPECIFICATION DC CharacteristicsSi4421 AC Characteristics PLL parameters AC Characteristics ReceiverSi4421 AC Characteristics Others Si4421AC Characteristics Transmitter AC Characteristics Turn-on/Turnaroundtimings Note 10 By design Si4421 Si4421 CONTROL INTERFACE Timing SpecificationTiming Diagram Control Commands Control Register Default ValuesSi4421 Si4421 Description of the Control CommandsConfiguration Setting Command 2. Power Management Command Si4421 Logic connections between power control bits Si4421 Frequency Setting Command4. Data Rate Command 5. Receiver Control Command Si4421 VDI Logic Diagram Si4421 6. Data Filter Command Si4421 7.FIFO and Reset Mode Command Si4421 8. Synchron Pattern Command9. Receiver FIFO Read Command 10. AFC Command Bit 5-4rl1 to rl0 Si4421 11. TX Configuration Control Command Frequency Setting CommandSi4421 13. Transmitter Register Write Command 12. PLL Setting CommandSi4421 14. Wake-UpTimer Command 15.Low Duty-CycleCommandSi4421 Si4421 Vlb= 2.25 + V · 0.1 V Clock divider configuration 17. Status Read Command Si4421Bit Name Si4421 INTERRUPT HANDLING Si4421 TX REGISTER BUFFERED DATA TRANSMISSION Typical TX register usage Si4421 RECOMMENDED PACKET STRUCTURES Si4421 RX FIFO BUFFERED DATA READ Bit Rate 38.4 kbps Si4421 CRYSTAL SELECTION GUIDELINESBit Rate 2.4 kbps Bit Rate 9.6 kbps Si4421 RX-TXALIGNMENT PROCEDURES Si4421 RESET MODES Si4421 Sensitive Reset Enabled, Ripple on VddFIFO and Reset Mode Command page SW Reset Command Channel Selectivity and Blocking Si4421 TYPICAL PERFORMANCE CHARACTERISTICS Si4421 BER Curves in 433 MHz BandBER Curves in 868 MHz Band 434 MHz Si4421 Frequency Dependent Component Values Si4421 REFERENCE DESIGNSSchematics Evaluation Board with 50 Ohm Matching Network PCB Layout Top View Bottom View Si4421 Frequency Dependent Component Values SchematicsSi4421 Evaluation Board with Resonant PCB Antenna BIFA Si4421 PCB Layout Antenna designed for 868/915 MHz bandTop View Bottom View Si4421 PACKAGE INFORMATION 16-pinTSSOPSee Detail “A” Section B-B Related Resources RELATED PRODUCTS AND DOCUMENTSSi4421 Universal ISM Band FSK Transceiver Demo Boards and Development Kits Si4421

Silicon Laboratories SI4421 manual Data Validity Blocks, Crystal Oscillator, Wake-UpTimer, Si4421

Models: SI4421