
Si4421
Data Validity Blocks
RSSI
A digital RSSI output is provided to monitor the input signal level. It goes high if the received signal strength exceeds a given preprogrammed level. An analog RSSI signal is also available. The RSSI settling time depends on the external filter capacitor. Pin 15 is used as analog RSSI output. The digital RSSI can be monitored by reading the status register.
Typical Analog ARSSI Voltage vs. RF Input Power
DQD
The operation of the Data Quality Detector is based on counting the spikes on the unfiltered received data. High output signal indicates an operating FSK transmitter within baseband filter bandwidth from the local oscillator. DQD threshold parameter can be set by using the Data Filter Command (page 19).
AFC
By using an integrated Automatic Frequency Control (AFC) feature, the receiver can minimize the TX/RX offset in discrete steps, allowing the use of:
∙Narrower receiver bandwidth (i.e. increased sensitivity)
∙Higher data rate
∙Inexpensive crystals
Crystal Oscillator
The Si4421 has a
The transceiver can supply a clock signal for the microcontroller; so accurate timing is possible without the need for a second crystal.
When the microcontroller turns the crystal oscillator off by clearing the appropriate bit using the Power Management Command (page 15), the chip provides a fixed number (192) of further clock pulses (“clock tail”) for the microcontroller to let it go to idle or sleep mode. If this clock output is not used, it is
suggested to turn the output buffer off by the Power Management Command (page 15).
Low Battery Voltage Detector
The low battery detector circuit monitors the supply voltage and generates an interrupt if it falls below a programmable threshold level. The detector circuit has 50 mV hysteresis.
Wake-Up Timer
The
The
Event Handling
In order to minimize current consumption, the transceiver supports different power saving modes. Active mode can be initiated by several
If any
Interface and Controller
An SPI compatible serial interface lets the user select the frequency band, center frequency of the synthesizer, and the bandwidth of the baseband signal path. Division ratio for the microcontroller clock,
The transmitter block is equipped with two
It is also possible to store the received data bits into a FIFO register and read them out in a buffered mode.
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