Si5351A/B/C

Register 18. CLK2 Control

 

Bit

 

D7

 

 

D6

 

D5

 

D4

 

D3

 

D2

 

D1

 

D0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Name

 

CLK2_PDN

 

MS2_INT

MS2_SRC

CLK2_INV

 

CLK2_SRC[1:0]

 

CLK2_IDRV[1:0]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Type

 

R/W

 

R/W

R/W

R/W

R/W

 

 

R/W

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Reset value = 0000 0000

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bit

 

 

Name

 

 

 

 

 

 

 

Function

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7

 

 

CLK2_PDN

 

Clock 2 Power Down.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

This bit allows powering down the CLK2 output driver to conserve power when the out-

 

 

 

 

 

 

 

put is unused.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0: CLK2 is powered up.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1: CLK2 is powered down.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

6

 

 

MS2_INT

 

MultiSynth 2 Integer Mode.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

This bit can be used to force MS2 into Integer mode to improve jitter performance. Note

 

 

 

 

 

 

 

that the fractional mode is necessary when a delay offset is specified for CLK2.

 

 

 

 

 

 

 

 

0: MS2 operates in fractional division mode.

 

 

 

 

 

 

 

 

 

 

 

 

1: MS2 operates in integer mode.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5

 

 

MS2_SRC

 

MultiSynth Source Select for CLK2.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0: Select PLLA as the source for MultiSynth0.

 

 

 

 

 

 

 

 

 

 

 

 

1: Select PLLB (Si5351A/C only) or VCXO (Si5351B only) MultiSynth0.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

 

CLK2_INV

 

Output Clock 2 Invert.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0: Output Clock 2 is not inverted.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1: Output Clock 2 is inverted.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3:2

 

CLK2_SRC[1:0]

 

Output Clock 2 Input Source.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

These bits determine the input source for CLK2.

 

 

 

 

 

 

 

 

 

 

 

 

00: Select the XTAL as the clock source for CLK2. This option by-passes both synthesis

 

 

 

 

 

 

 

stages (PLL/VCXO & MultiSynth) and connects CLK2 directly to the oscillator which gen-

 

 

 

 

 

 

 

erates an output frequency determined by the XTAL frequency.

 

 

 

 

 

 

 

 

 

 

01: Select CLKIN as the clock source for CLK2. This by-passes both synthesis stages

 

 

 

 

 

 

 

(PLL/VCXO & MultiSynth) and connects CLK2 directly to the CLKIN input. This essen-

 

 

 

 

 

 

 

tially creates a buffered output of the CLKIN input.

 

 

 

 

 

 

 

 

 

 

 

 

10: Reserved. Do not select this option.

 

 

 

 

 

 

 

 

 

 

 

 

11: Select MultiSynth 0 as the source for CLK2. Select this option when using the Si5351

 

 

 

 

 

 

 

to generate free-running or synchronous clocks.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1:0

 

CLK2_IDRV[1:0]

 

CLK2 Output Rise and Fall time / Drive Strength Control.

 

 

 

 

 

 

 

 

 

 

00: 2 mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

01: 4 mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

10: 6 mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

11: 8 mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

32

Preliminary Rev. 0.95

Page 32
Image 32
Silicon Laboratories SI5351A/B/C specifications Register 18. CLK2 Control, Clock 2 Power Down, MultiSynth 2 Integer Mode

SI5351A/B/C specifications

Silicon Laboratories SI5351A/B/C is a versatile, low-power clock generator and frequency synthesizer that has gained widespread popularity in various applications, including telecommunications, consumer electronics, and industrial control systems. These devices are primarily designed to provide precise clock frequency generation with low phase noise and jitter, making them ideal for high-performance applications.

One of the standout features of the SI5351 is its ability to generate multiple output frequencies simultaneously. Capable of producing up to three independent programmable outputs, the SI5351A/B/C can generate frequencies ranging from 8 kHz to 160 MHz. With its integrated phase-locked loop (PLL) technology, it achieves excellent frequency stability and accuracy, simplifying the design of frequency-dependent systems.

The device operates under a supply voltage range of 1.8V to 3.6V, allowing it to be used in battery-powered applications without excessive power consumption. The SI5351’s low current draw, typically as low as 25 mA, is especially beneficial in portable devices, extending battery life and enhancing overall efficiency. Furthermore, it features a programmable output driver, which can be set to various drive strengths, ensuring compatibility with a wide array of load requirements.

Configuration and control of the SI5351 are user-friendly, implemented via an I2C interface. This allows for straightforward integration into microcontroller-based designs. Moreover, the device includes an on-chip memory that stores settings, which streamlines the reconfiguration process when power cycling, minimizing setup time for developers.

Another significant advantage of the SI5351A/B/C is its output jitter performance, which is typically below 1 ps, resulting in clean output signals essential for high-speed data communications and precise timing applications. The SI5351’s integration of multiple synthesizer stages contributes to its impressive phase noise characteristics, making it suitable for demanding RF applications.

Additionally, the SI5351 devices offer programmable frequency stepping, allowing users to define custom frequency increments, which is particularly useful in applications requiring precise tuning or modulation. This flexibility, combined with its compact size and simple interface, makes the SI5351A/B/C an ideal choice for engineers seeking a reliable, cost-effective solution for generating clock signals in a myriad of electronic systems.

In summary, Silicon Laboratories SI5351A/B/C provides a robust, low-power solution for high-precision clock generation, characterized by its programmable outputs, low jitter, easy configurability, and broad frequency range, making it an excellent choice for both commercial and industrial applications across various sectors.