Register Descriptions | Silicon Laboratories SI5351A/B/C manual

Si5351A/B/C

8. Register Descriptions

Bit

Name

SYS_INIT

LOL_B

LOL_A

LOS

REVID[1:0]

Type

Reset value = 0000 0000

Bit

Name

Function

SYS_INIT

System Initialization Status.

During power up the device copies the content of the NVM into RAM and performs a system

initialization. The device is not operational until initialization is complete. It is not recom-

mended to read or write registers in RAM through the I2C interface until initialization is com-

plete. An interrupt will be triggered (INTR pin = 0, Si5351C only) during the system

initialization period.

0: System initialization is complete. Device is ready.

1: Device is in system initialization mode.

LOL_B

PLLB Loss Of Lock Status.

Si5351A/C only. PLLB will operate in a locked state when it has a valid reference from CLKIN

or XTAL. A loss of lock will occur if the frequency of the reference clock forces the PLL to

operate outside of its lock range as specified in Table 3, or if the reference clock fails to meet

the minimum requirements of a valid input signal as specified in Table 4. An interrupt will be

triggered (INTR pin = 0, Si5351C) during a LOL condition.

0: PLL B is locked.

1: PLL B is unlocked. When the device is in this state it will trigger an interrupt causing the

INTR pin to go low (Si5351C only).

LOL_A

PLL A Loss Of Lock Status.

PLL A will operate in a locked state when it has a valid reference from CLKIN or XTAL. A loss

of lock will occur if the frequency of the reference clock forces the PLL to operate outside of

its lock range as specified in Table 3, or if the reference clock fails to meet the minimum

requirements of a valid input signal as specified in Table 4. An interrupt will be triggered

(INTR pin = 0, Si5351C only) during a LOL condition.

0: PLL A is operating normally.

1: PLL A is unlocked. When the device is in this state it will trigger an interrupt causing the

INTR pin to go low (Si5351C only).

LOS

CLKIN Loss Of Signal (Si5351C Only).

A loss of signal status indicates if the reference clock fails to meet the minimum requirements

of a valid input signal as specified in Table 4. An interrupt will be triggered (INTR pin = 0,

Si5351C only) during a LOS condition.

0: Valid clock signal at the CLKIN pin.

1: Loss of signal detected at the CLKIN pin.

3:2

Reserved

Leave as default.

1:0

REVID[1:0]

Revision ID. Device revision number. Set at the factory.

Preliminary Rev. 0.95

SI5351A/B/C specifications

Silicon Laboratories SI5351A/B/C is a versatile, low-power clock generator and frequency synthesizer that has gained widespread popularity in various applications, including telecommunications, consumer electronics, and industrial control systems. These devices are primarily designed to provide precise clock frequency generation with low phase noise and jitter, making them ideal for high-performance applications.

One of the standout features of the SI5351 is its ability to generate multiple output frequencies simultaneously. Capable of producing up to three independent programmable outputs, the SI5351A/B/C can generate frequencies ranging from 8 kHz to 160 MHz. With its integrated phase-locked loop (PLL) technology, it achieves excellent frequency stability and accuracy, simplifying the design of frequency-dependent systems.

The device operates under a supply voltage range of 1.8V to 3.6V, allowing it to be used in battery-powered applications without excessive power consumption. The SI5351’s low current draw, typically as low as 25 mA, is especially beneficial in portable devices, extending battery life and enhancing overall efficiency. Furthermore, it features a programmable output driver, which can be set to various drive strengths, ensuring compatibility with a wide array of load requirements.

Configuration and control of the SI5351 are user-friendly, implemented via an I2C interface. This allows for straightforward integration into microcontroller-based designs. Moreover, the device includes an on-chip memory that stores settings, which streamlines the reconfiguration process when power cycling, minimizing setup time for developers.

Another significant advantage of the SI5351A/B/C is its output jitter performance, which is typically below 1 ps, resulting in clean output signals essential for high-speed data communications and precise timing applications. The SI5351’s integration of multiple synthesizer stages contributes to its impressive phase noise characteristics, making it suitable for demanding RF applications.

Additionally, the SI5351 devices offer programmable frequency stepping, allowing users to define custom frequency increments, which is particularly useful in applications requiring precise tuning or modulation. This flexibility, combined with its compact size and simple interface, makes the SI5351A/B/C an ideal choice for engineers seeking a reliable, cost-effective solution for generating clock signals in a myriad of electronic systems.

In summary, Silicon Laboratories SI5351A/B/C provides a robust, low-power solution for high-precision clock generation, characterized by its programmable outputs, low jitter, easy configurability, and broad frequency range, making it an excellent choice for both commercial and industrial applications across various sectors.

Silicon Laboratories SI5351A/B/C specifications Register Descriptions

Models: SI5351A/B/C