Ultra Fast USB 2.0
7.3.3.33F4h: MS/SD Clock Limit
BYTE NAME | TYPE | BITS |
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| Upper | 7:4 | 0: MS - 60 | MHz | |
| Nibble Bits |
| 1: MS - 40 | MHz | |
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| 2: MS - 20 | MHz | |
MS_SD_CLK_LIM |
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| 3: MS - 15 | MHz | |
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Lower | 3:0 | 0: SD/MMC - 48 MHz | |||
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| Nibble Bits |
| 1: SD/MMC - 24 MHz | ||
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| 2: SD/MMC - 20 MHz | ||
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| 3: SD/MMC - 15 MHz | ||
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7.3.3.34F5h: Reserved
BIT |
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NUMBER | BYTE NAME | DEFAULT VALUE | DESCRIPTION |
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7:0 | Reserved | 66h | Reserved. |
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7.3.3.35F6h: Reserved
BIT |
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NUMBER | BYTE NAME | DEFAULT VALUE | DESCRIPTION |
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7:0 | Reserved | 00h | Reserved for media usage. |
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7.3.3.36FCh-FFh: Non-volatile Storage Signature
BYTE |
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NUMBER | BYTE NAME | STRING | DESCRIPTION |
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7:0 | NVSTORE_SIG | “ATA2” | This signature is used to verify the validity of the |
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| data in the configuration area. The signature must be |
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| set to ‘ATA2’ for USB2640/USB2641. |
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The I2C EEPROM interface implements a subset of the I2C Master Specification (Please refer to the Philips Semiconductor Standard
Note: Extensions to the I2C Specification are not supported.
The device acts as the master and generates the serial clock SCL, controls the bus access (determines which device acts as the transmitter and which device acts as the receiver), and generates the START and STOP conditions.
SMSC USB2640/USB2641 | 47 | Revision 2.0 |
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