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Sony MZ-NH1 SCHEMATIC DIAGRAM – MAIN Section (9/9) –

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MZ-NH1

6-12. SCHEMATIC DIAGRAM – MAIN Section (9/9) – • See page 24 for Waveform. • See page 42 for IC Pin Function Description.

SDO0

SDO0

SCK0

SCK0

T1

T2

T3

T5

T4

(Page 32)	CHG_LED
(Page 32)	T6
	T7

SUSPEND

USB_HOLD

RECP

EFM_CLK

EFM

(Page XCS_REC_DRV

26) VBUS_DET

VBUS_MON MINUS_MON CHG_MON VB_MON HIDC_MON CHG_SW XGUM_ON CHG_XRST CHG_I_CTL1

CHG_I_CTL2

(Page CHG_I_CTL3

CHG_I_SEL

28) CHG_CTL CHG_PWM CHG_CAL CHG_OPR

	XRST_MTR_DRV
	SLD_CON_W
	SLD_CON_V
	SLD_CON_U
	SLD_PWM
	SLD_MON_U
	SLD_MON_V
	SLD_MON_W
	TF1
	TR1
	ZI2
(Page	ZI1
	FR1

25)	FF1
25)	CLV_CON_W
	CLV_CON_V
	CLV_CON_U
	CLV_PWM
	CLV_MON_U
	CLV_MON_V
	CLV_MON_W
	SO
	SI
	XLDON
	PLSE_XDC
	LC_DRV1
	LC_DRV2
	PEAK
	BOTM
	OFTRK
	TE
	FE
	ABCD
	VREF
(Page 27)	XRST_RF
	SSB_DATA

(9/9)

CHG_LED

SUSPEND

USB_HOLD

RECP

EFM_CLK

EFM

XCS_REC_DRV

VBUS_DET

VBUS_MON

MINUS_MON

CHG_MON

VB_MON

HIDC_MON

CHG_SW

XGUM_ON

CHG_XRST

CHG_I_CTL1

CHG_I_CTL2

CHG_I_CTL3

CHG_I_SEL

CHG_CTL

CHG_PWM

CHG_CAL

CHG_OPR

XRST_MTR_DRV

SLD_CON_W

SLD_CON_V

SLD_CON_U

SLD_PWM

SLD_MON_U

SLD_MON_V

SLD_MON_W

TF1

TR1

ZI2

ZI1

FR1

FF1

CLV_CON_W

CLV_CON_V

CLV_CON_U

CLV_PWM

CLV_MON_U

CLV_MON_V

CLV_MON_W

SO

SI

XLDON

PLSE_XDC

LC_DRV1

LC_DRV2

PEAK

BOTM

OFTRK

TE

FE

ABCD

VREF

XRST_RF

SSB_DATA

SSB_CLK

XLDON

ZI2

ZI1

R835

470k

R834

220k

C813

0.047

D_VCONT_PWM

CHG_OPR

XCS_REG_DRV

CS_RTC

VBUS_DET

SSB_DATA

SSB_CLK

UMD_PROTECT

PLSE_XDC

DRAM_HOLD_DET

DRAM_VDD_CLR

REG5_REG

R827

10

D_EN1

D_EN2

D_ENVG

LA

C_

GH

C

R854

0

R845

220k

R836

47k

R852

0

R869

1M

R823

10k

R862

0

SL803

R830

0

R828

VNSCX

VRDTBMSTR

TLCGHC

EDLSCX

ICRWPCSX

UNOCVLC

CPRE

LESIGHC

2STRX

WSLDOHX

FRSTRX

3CTLIHGC

2CTLICHG

1CTLICHG

LRFFC

PELES

UNOCSLD

1KC S

1OD S

I1DS

EUT MX

EGENRD

1S

0S

TSXRHGC

ENALOMDRA

LTC CCDVM

LEDECR

LCT TOPX

PEE B

NO MGUX

R866K00SC

R867DO00S

DI0S

WS GHC

TSR LCD

CAD DPX

CDA CSX

SWO/C

ETDXMIC

ETDJACK X

TDE TOP

TTEC ORP

SEAU P

EFM

KFTR O

R810

R813

R825IN10D

UN OC LDS

WN OM LDS

VN OM LDS

UN OM LDS

WN OC DSL

VON CLDS

WN OM VCL

VN OM LVC

UN OM LVC

WN COLVC

VON CVLC

MW PCLV

C851

MWP

LKCEFM

256FSA

0.1

_

C855

G

HC

0.1

R857

0

2.2k

X

100R861

R8650

0

FB803

0

SL801

0

R858

2.2k

SLBUSY

XMUTE

ENREGD

ALONEDRAM

CTLMDVCC

LEDLED/ACCESSREC

SPREQLAM

REQCHKLAM

ONXGUM

SWA7CAL

DETXJACK

PROTECT

KEYPAUSE

OFTRK

CHOPPERCLK

XTEST

FFCLR

SLEEP

REC_KEY/DOWNLOAD

SYSTEM CONTROLLER,DIGITAL SIGNAL PROCESSOR

CSP(Chip Size Package)

WK_DET
R876	REG5_REG
0

R846

47k

C847

0.1

Q803

2SC4738F-Y/GR (TPL3)

WAKE UP

SWITCH

CLV_CON_U

SLD_PWM

							4FS
						FR1
						FF1
						TF1
						TR1
							ADIP
R855			0				DCLSOUTL
R856			0				DCLSOUTR
							VIN
				R839
				0
							APCREF_DA
						REG_DACVREFH
C814				C843		R840
C814			C817	C843		0
0.1			0.1	0.1
C812
1				C810
				0.1			XRST
							XRST
							HALF_LOCK
							REC_KEY
							RST_CONT
							RMC_KEY
				R814 10k			MINUS_MON
							VBUS_MON
							WK_DET
							HIDC_MON
R870			0
				C825	1000p		SET_KEY_2
				C826	1000p		SET_KEY_1
							VREF
				R837 2.2k			CHG_MON
				C827		0.1	VB_MON
							D_VREG0
				C803		0.01
					D803		R868
				MA2SD32000SB			0
R847		0
							TE
							S_MON
							VC
							FE
							ABCD
							BOTM
							PEAK
C809	0.1			R820		R821	2.2M
				R820
R817	1k			220
R817	1k

		SSB_CLK
		ADIP
		S_MON
		APCREF_DA
		VC
		RFI
		MDVCC_CTL
		A_FS257
		VIN
		UDP
		UDM
	(Page 28)	D_VCONT_PWM
		FS512
		D_ENVG
		D_EN1
		D_EN2
		D_VREG0
		D_ENREG
	(Page	XMUTE
	(Page	BEEP
	31)	DCLSOUTR
	31)	DCLSOUTL
		DCLSOUTL
		OPT_DET
		XJACK_DET
		DIN1
		XOPT_CTL
		ADDT
		FS256
	(Page 30)	LRCK
		XBCK
		XCS_ADC
		XCS_ADC
		XPD_ADC
		XMIC_DET

R1

Q1

MZ-NH1

ADIP

S_MON

APCREF_DA

VC

RFI

MDVCC_CTL

A_FS256

VIN

D_VCONT_PWM

FS512

D_ENVG

D_EN1

D_EN2

D_VREG0

D_ENREG

XMUTE

BEEP

DCLSOUTR

DCLSOUTL

OPT_DET

XJACK_DET

DIN1

XOPT_CTL

ADDT

FS256

LRCK

XBCK

XCS_ADC

XPD_ADC

XMIC_DET

R818 R819

C808

R822

LC_DRV1

R815 220k

2.2k

1k

1

1M

LC_DRV2

RFI

C805

0.47

C804

0.01

REG5_REG

R849 0

C861

R811 R812

R848

0

22p

10k

100k

FS256

R864

0

FB810

0

ADDT

R843

0

Q801,802

LRCK

R863

0

FB809

0

B+ SWITCH

Q802

R859

2SK1838-TE85L

XBCK

R809

0

FB802

0

1M

C801 10p

S

FB807

0

C802

X802

R808

1k

S

22.5792MHz

10p

FS512

FB808

0

FS512

UOSCI

EBIFVDD3

RMC_DTCK

DTCK

EBIFVSS2

Q801

R804

22

XP152A12C0MR

R860

R805

22

1M

USB_HOLD

R8067k.4

R8072k2.

SUSPEND

47

VOUT

VSS

+2.5V REGULATOR

IC804

XC61CC2502NR

R802

R801

4.7k

X801

R8260

3VC819.6 47

3VC836.106

3VC838.610

48MHz

R83222k

C8563V476.

L80310

L80410

FB801

C811

C821

100p

C849

L802

0.1

C852

R833

0.1

REG4_DVDD

0

C822

C823

0.1

0.1

0.1

C845

C835

R850

0.1

22∝H

0.1

0

L870

10∝H

REG_F

C820

C818

47

0.1

3.3V

C839

R824

C816

6.3V

REG5_VSTB

0.1

10

47

6.3V

REG5_OSC

D801 MA2SD3100LS0

REG5_REG

CL8007

CL8003

L801

33 33

Contents

SPECIFICATIONS Sony Corporation Personal Audio Company Page TABLE OF CONTENTS SERVICING NOTES GENERAL 3.DISASSEMBLY TEST MODE NOTES ON HANDLING THE OPTICAL PICK-UPBLOCK OR BASE UNIT NOTES ON LASER DIODE EMISSION CHECK UNLEADED SOLDER : LEAD FREE MARK Installing The recorder The display window of the recorder The headphones/earphones with a remote control The display window of the remote control 3-1.DISASSEMBLY FLOW Note 1: Note 2: 3-2.BOTTOM PANEL SUB ASSY 3-3.MAIN BOARD 3-4.UPPER PANEL SUB ASSY 3-5.CONTROL ORNAMENT BLOCK 3-6.MECHANISM DECK ASSY (MT-MZNH1-181) 3-7.GEAR (BSA), GEAR (SB) 3-8.OP SERVICE ASSY 3-10.HOLDER ASSY Ver Ver Manual AdjF MENU MD1Run HM3Run OfsRun OPChk ResOK SET OK ## RMC OK ## Temp SetTmp POWER PwrAdj VC1 VBsAdj ChrgLi DESIGN LrefPw DistF 3-9.Resume Clear 3-10.Releasing The Test Mode 6-1.BLOCK DIAGRAM – MD SERVO Section – 6-2.BLOCK DIAGRAM – AUDIO Section – 4-3.BLOCK DIAGRAM – POWER SUPPLY Section – •Note For Printed Wiring Boards and Schematic Diagrams Note on Printed Wiring Board: Note on Schematic Diagram: •Waveforms IC701 1 (VI1), 2 (WI1) SCHEMATIC DIAGRAM – MAIN Section (1/9) – See page 36 for IC Block Diagrams SCHEMATIC DIAGRAM – MAIN Section (3/9) – See page 36 for IC Block Diagram SCHEMATIC DIAGRAM – MAIN Section (5/9) – SCHEMATIC DIAGRAM – MAIN Section (6/9) – Page SCHEMATIC DIAGRAM – MAIN Section (8/9) – SCHEMATIC DIAGRAM – MAIN Section (9/9) – 6-13.PRINTED WIRING BOARD – MAIN Section (1/2) – : Uses unleaded solder •Semiconductor Location Ref. No Location 6-14.PRINTED WIRING BOARD – MAIN Section (2/2) – : Uses unleaded solder Ref. No. Location CXD9811K IC401 MM1655LCBE IC501 SN761059ZQLR IC601 SC901585VAR2 IC602 R1160N121B-TR-FA IC701 SC901583EPR2 IC871 R2061K01-E2 IC891 AK6514CN-L IC901 SC901584EPR2 IC902 XC62HR5502MR •IC Pin Function Description IC801 CXD2681-222GG(SYSTEM CONTROLLER, DIGITAL SIGNAL PROCESSOR) Page Page Page Page Page Page NOTE: 7-1.PANEL SECTION MAIN SECTION 7-3.MECHANISM DECK SECTION