H8QG6/i+-F Serverboard User’s Manual

TX Drive Strength

Use this setting to configure TX drive strength. Options include Auto, 26mA, 20mA, 22mA and 24mA.

TXCLK Clock Gating in L1

Use this setting to Enable or Disable the TXCLK clock gating in L1.

LCLK Clock Gating in L1

Use this setting to Enable or Disable the LCLK clock gating in L1.

SB Core Setting

TX Drive Strength

Use this setting to configure TX drive strength. Options include Auto, 26mA, 20mA, 22mA and 24mA.

TXCLK Clock Gating in L1

Use this setting to Enable or Disable the TXCLK clock gating in L1.

LCLK Clock Gating in L1

Use this setting to Enable or Disable the LCLK clock gating in L1.

Debug Option

Peer to Peer Among GPP1/GPP2

Use this setting enable or disable Peer to Peer among GPP1/GPP2. Options include Auto, Enabled and Disabled.

Reset to Training Delay (ms)

Use the +/- keys to change the reset to training delay time setting. The default is 50.

Receiver Detection Pooling (ms)

Use the +/- keys to change the receiver detection pooling time setting. The default is 180.

Hide Unused PCIE P2P Bridges

Use this setting to Enable or Disable the hiding of unused PCIE P2P bridges.

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SUPER MICRO Computer H8QGI+-F, H8QG6+-F user manual SB Core Setting