Feature | Option | Description | |
North Bridge Chipset Configuration |
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Channel Dependent | Enabled | Channel dependent rank/DIMM sparing | |
Sparing | Disabled | enabled/disabled | |
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Channel 0 | Enabled | Channel 0 enabled/disabled | |
Disabled | |||
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Channel Specific | Disabled | Enables rank/DIMM sparing feature | |
Sparing | Enabled | ||
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Rank Interleaving | 1:1 | Rank Interleaving setting | |
2:1 | |||
| 4:1 |
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Channel 1 | Enabled | Channel 1 enabled/disabled | |
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Disabled | |||
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Channel Specific | Disabled | Enables rank/DIMM sparing feature | |
Sparing | Enabled | ||
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Rank Interleaving | 1:1 | Rank Interleaving setting | |
2:1 | |||
| 4:1 |
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Boots Graphic Adapter | Auto | Select which graphic controller to use | |
Priority | Onboard VGA | as the primary boot device. | |
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Read Completion | Disabled |
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| Read returns of > 64B | ||
Enabled | |||
Coalescing | |||
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| Auto |
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| Auto | Auto: Dram Clock running by SPD | |
DRAM Clock |
| DDR533: Force memory running at 533 | |
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| DDR533 | MHz | |
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64
