Virtex-4 LX/SX Prototype Platform | Xilinx UG078 instruction

Virtex-4 LX/SX

Prototype Platform

User Guide

UG078 (v1.2) May 24, 2006

R

P/N 0402226-06

Image 1

Xilinx manual Virtex-4 LX/SX Prototype Platform, UG078 v1.2 May 24

Contents

UG078 v1.2 May 24 Virtex-4 LX/SX Prototype Platform Date Version Revision Revision History Table of Contents Virtex-4 LX/SX Prototype Platform Additional Resources Guide ContentsConventions Typographical Preface About This Guide Online DocumentMeaning or Use Example CD-ROM Contents Package ContentsIntroduction Introduction Features Virtex-4 LX/SX Prototype Platform Block Diagram Detailed Description Power SwitchDetailed Description Power Enable Jumpers Power Supply Jacks Serial Mode Configuration Ports Jtag Termination Jumper Jtag Chain 6b. Downstream System ACE Interface Connector 6a. Upstream System ACE Interface Connector Upstream Interface Connector 44-Pin Female 6c. Upstream Interface Connector VCCO-Enable Supply Jumpers 6d. Downstream Interface ConnectorPrototyping Area Clock Name Pin Number Oscillator Sockets SMA Clock Pin Connections for SF363 and FF668 Differential Clock InputsClock Name SMA Clock Pin Connections for FF1148 and FF1513 Pin Breakout DUT Socket Breakout FF668 User LEDs Active-High Reset Switch Active-Low Program SwitchPlatform Flash Isprom