Xilinx manual Virtex-4DUT, Introduction, shows a block diagram of the board, UG078 v1.2 May

Models: UG078

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Figure 1 shows a block diagram of the board.

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Introduction

Figure 1 shows a block diagram of the board.

Upstream

System ACE

Interface

Connector

Upstream

Interface

Connector

2x

LVTTL

2x Diff Pair

Clocks

SMA SMA

LEDs

Virtex-4 DUT VBATT

Virtex-4 DUT

Configuration

Port

To Test Points

on All Pins

PROGRAM

User RESET

Downstream

 

 

 

System ACE

 

 

Downstream

Interface

 

 

Interface

Connector

 

 

Connector

 

 

 

 

Power Bus and Switches

5V Jack -or- 5V Brick

LVTTL 2x

SMA SMA

2x Diff Pair Clocks

DONE INIT Manual background LED Manual background LED

VCCINT

Manual background VCC Jack

VCCO

Manual background VCCO Jack

Manual background VCCAUX Manual background VCCAUX Jack

VCC3

Manual background VCC1V8 Manual background

AVCC

UG078_01_101204

Figure 1: Virtex-4 LX/SX Prototype Platform Block Diagram

Virtex-4 LX/SX Prototype Platform

www.xilinx.com

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UG078 (v1.2) May 24, 2006

Page 9
Image 9
Xilinx manual Virtex-4DUT, Introduction, shows a block diagram of the board, UG078 v1.2 May