Xilinx UG078 manual Virtex-4 LX/SX Prototype Platform Block Diagram

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Introduction

Figure 1 shows a block diagram of the board.

Upstream

System ACE

Interface

Connector

Upstream

Interface

Connector

2x

LVTTL

2x Diff Pair

Clocks

SMA SMA

LEDs

VBATT

Virtex-4 DUT

Configuration

Port

To Test Points

on All Pins

PROGRAM

User RESET

Downstream
System ACE	Downstream
Interface	Interface
Connector	Connector

Power Bus and Switches

5V Jack -or- 5V Brick

LVTTL 2x

SMA SMA

2x Diff Pair Clocks

DONE INIT LED LED

VCCINT

VCC Jack

VCCO

VCCO Jack

VCCAUX VCCAUX Jack

VCC3

VCC1V8

AVCC

UG078_01_101204

Figure 1: Virtex-4 LX/SX Prototype Platform Block Diagram

Virtex-4 LX/SX Prototype Platform www.xilinx.com 9

UG078 (v1.2) May 24, 2006