YMF715E
OPL3 Data Register Array 1 (R/W)
Index | D7 |
| D6 |
| D5 | D4 | D3 |
| D2 |
| D1 | D0 | |
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00 | - 01h |
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| LSI TEST |
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04h | - |
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| CONNECTION SEL |
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05h | - |
| - |
| - | - | - |
| NEW3 |
| * | NEW | |
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20 | - 35h | AM |
| VIB |
| EGT | KSR |
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| MULT |
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40 | - 55h |
| KSL |
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| TL |
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60 | - 75h |
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| AR |
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| DR |
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80 | - 95h |
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| SL |
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| RR |
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A0 | - A8h |
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B0 | - B8h | - |
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| KON |
| BLOCK |
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C0 | - C8h | * |
| * |
| CHR | CHL |
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| FB |
| CNT | |
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E0 | - F5h | - |
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| - | - | - |
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| WS |
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The bit remarked * indicates that these can be read and written but not effective.
Note :
The wait time of 960ns(min.) is needed before access to OPL3 registers.
9-1-2. Sound Blaster Pro compatibility
The followings are the I/Os for Sound Blaster Pro compatibility.
SB base | (R) | OPL3 Status port |
SB base | (W) | OPL3 Address port for Register Array 0 |
SB base + 1h | (R/W) | OPL3 Data register |
SB base + 2h | (W) | OPL3 Address port for Register Array 1 |
SB base + 3h | (R/W) | OPL3 Data port |
SB base + 4h | (W) | SB Mixer Address port |
SB base + 5h | (R/W) | SB Mixer Data port |
SB base + 6h | (W) | DSP Reset port |
SB base + 8h | (R) | OPL3 Status port |
SB base + 8h | (W) | OPL3 Address port for Register Array 0 |
SB base + 9h | (R/W) | OPL3 Data port |
SB base + Ah | (R) | DSP Read Data port |
SB base + Ch | (R) | DSP |
SB base + Ch | (W) | DSP Write Command/Data port |
SB base + Eh | (R) | DSP |
May 21, 1997
