YMF715E
Miscellaneous:
| Index |
| D7 |
| D6 |
| D5 | D4 | D3 | D2 | D1 |
| D0 |
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| 0Ah |
| VEN |
| - |
| - | MCSW | MODE | VER2 | VER1 |
| VER0 |
| VEN... |
| This bit enables the hardware volume control. Default is VEN=“1”. |
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| MCSW... |
| This bit determines whether Rch of Mic input or loopback of monaural | ||||||||||
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| output is connected to A/D. This will be useful to support the echo | |||||||||
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| cancellation. When “0” is set to this bit, Rch of Mic input is selected. |
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| MODE... |
| This bit indicates the SB or WSS mode. If MODE=0, it is the SB mode. | ||||||||||
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| This bit is read only. |
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| These bits indicate the version of | |||||||||||
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| VER1=“0”, VER0=“0”). |
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| default : 84h |
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WSS DMA Base counter (R/W): |
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| Index |
| D7 |
| D6 |
| D5 | D4 | D3 | D2 | D1 |
| D0 |
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| 0Bh |
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| Playback Base Counter (Low) |
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| 0Ch |
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| Playback Base Counter (High) |
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| 0Dh |
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| Recording Base Counter (Low) |
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| 0Eh |
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| Recording Base Counter (High) |
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These registers are to load the value to WSS DMA base counter and read out the present value. Initial value is FFh.
In case of loading the value, both high and low bytes are loaded to internal DMA counter when the high byte is written. The value set to this register is “(the number of transfer byte)
When read these registers, the present value of DMA base counter is read out.
These registers are used mainly to support the suspend/resume feature that is very important for Notebook PC application.
WSS Interrupt Scan out/in (R/W):
Index | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
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0Fh | - | - | - | - | - | STI | SCI | SPI |
Use the bits in this register to set WSS
STI... | “1” in this bit means TI=“1” and corresponding IRQ active. |
SCI... | “1” in this bit means CI=“1” and corresponding IRQ active. |
SPI... | “1” in this bit means PI=“1” and corresponding IRQ active. |
default : 00h |
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Notice) |
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To make IRQ active, it is necessary to set “1” to WSS CODEC indirect register index 0Ah IEN bit.
May 21, 1997