YMF724F

PIN DESCRIPTION

1. PCI Bus Interface (53-pin)

name

I/O

Type

Size

function

 

 

 

 

 

PCICLK

I

P

 

PCI Clock

RST#

I

P

 

Reset

AD[31:0]

IO

Ptr

 

Address / Data

C/BE[3:0]#

IO

Ptr

 

Command / Byte Enable

PAR

IO

Ptr

 

Parity

FRAME#

IO

Pstr

 

Frame

IRDY#

IO

Pstr

 

Initiator Ready

TRDY#

IO

Pstr

 

Target Ready

STOP#

IO

Pstr

 

Stop

IDSEL

I

P

 

ID Select

DEVSEL#

IO

Pstr

 

Device Select

REQA#

O

P

 

PCI Request

GNTA#

I

P

 

PCI Grant

PCREQ#

O

Ptr

 

PC/PCI Request

PCGNT#

I

Ptr

 

PC/PCI Grant

PERR#

IO

Pstr

 

Parity Error

SERR#

O

Pod

 

System Error

INTA#

O

Pod

 

Interrupt signal output for PCI bus

SERIRQ#

IO

Ptr

 

Serialized IRQ.

2. YMF730(AC-2) Interface (6-pin)

name

I/O

Type

Size

 

function

 

 

 

 

 

CRST#

O

T

6mA

Reset signal for AC-2

CMCLK

O

C

-

Master Clock of AC link (24.576MHz) and

 

 

 

 

AC3F2

 

CBCLK

I

T

-

AC-link: Bit Clock for AC-2 audio data

CSDO

O

T

6mA

AC-link: AC-2

Serial audio output data

CSDI

I

T

-

AC-link: AC-2

Serial audio input data

CSYNC

O

T

6mA

AC-link: Synchronized signal

September 21, 1998

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Yamaha YMF724F specifications PIN Description, PCI Bus Interface 53-pin, YMF730AC-2 Interface 6-pin