Agilent Technologies FS2010 user manual Devsel# Trdy# Stop#

Page 20

The TERM CODE variable is made up of DEVSEL#, TRDY#, and

STOP#. The following lists the bit pattern and the corresponding symbol.

 

 

 

 

 

 

 

 

Symbol

DEVSEL#

TRDY#

STOP#

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MASTER ABORT

1

1

1

 

 

 

 

 

 

 

 

SPLIT RESPONSE

1

0

1

 

 

 

 

 

 

 

 

TARGET ABORT

1

1

0

 

 

 

 

 

 

 

 

SINGLE DATA DISC

1

0

0

 

 

 

 

 

 

 

 

RETRY

0

1

0

 

 

 

 

 

 

 

 

DISC NXT ADB

0

0

0

 

 

 

 

 

 

The hardware layout of the FS2010 made it impossible for the signals to

Bit Re-orderingbe connected to the logic analyzer in a logical order. Therefore, bit re- ordering is done in the configuration file to make the data easier to view. The bit re-ordering function can be found in the FORMAT menu.

Below is a list of labels that have been re-ordered

ADDR

ADDR_B

STAT

AD_HI

AD_LO

C/B3_0

CYCLE

TERM CODE

20

Image 20
Contents Page FS2010 Software and Timing mode J2 Signal Connector How to reach us Assistance Product WarrantyLimitation Warranty How to Use This Manual IntroductionAccessories Supplied Analyzing the PCI-X Local BusPage Configuration Files Connecting the 167xx Agilent logic analyzer to the FS2010 How to install a PCI-X add-in card into the FS2010Setting up the 167xx Analyzer 167xx Licensing 1680/90/900 Licensing Offline Analysis Page Page Format Menu PCI-X Transaction Decode Software FS2010 Software and Timing mode Cycle variable DEVSEL# TRDY# STOP# State Analysis Acquiring DataConfiguring the Workspace for PCI-X Analysis State Listing Display Above figure shows the listing from the 169xx frame Functionality FS2010 Transaction Decode Software Name Base DescriptionTiming Analysis Waveform Display Use of EyeFinder/Eyescan Transaction Viewer Characteristics General InformationSignal Connections State/Timing Adapter Probe interface pinoutJ2 Signal Connector INTD# J3 Signal Connections SERR# J4 Signal Connections Samtec